BNXT_FW_HEALTH_WIN_MAP_OFF);
 }
 
+static void bnxt_inv_fw_health_reg(struct bnxt *bp)
+{
+       struct bnxt_fw_health *fw_health = bp->fw_health;
+       u32 reg_type;
+
+       if (!fw_health || !fw_health->status_reliable)
+               return;
+
+       reg_type = BNXT_FW_HEALTH_REG_TYPE(fw_health->regs[BNXT_FW_HEALTH_REG]);
+       if (reg_type == BNXT_FW_HEALTH_REG_TYPE_GRC)
+               fw_health->status_reliable = false;
+}
+
 static void bnxt_try_map_fw_health_reg(struct bnxt *bp)
 {
        void __iomem *hs;
        u32 reg_type;
        u32 sig;
 
+       if (bp->fw_health)
+               bp->fw_health->status_reliable = false;
+
        __bnxt_map_fw_health_reg(bp, HCOMM_STATUS_STRUCT_LOC);
        hs = bp->bar0 + BNXT_FW_HEALTH_WIN_OFF(HCOMM_STATUS_STRUCT_LOC);
 
                                             BNXT_FW_HEALTH_WIN_BASE +
                                             BNXT_GRC_REG_CHIP_NUM);
                }
-               if (!BNXT_CHIP_P5(bp)) {
-                       if (bp->fw_health)
-                               bp->fw_health->status_reliable = false;
+               if (!BNXT_CHIP_P5(bp))
                        return;
-               }
+
                status_loc = BNXT_GRC_REG_STATUS_P5 |
                             BNXT_FW_HEALTH_REG_TYPE_BAR0;
        } else {
        u32 reg_base = 0xffffffff;
        int i;
 
+       bp->fw_health->status_reliable = false;
        /* Only pre-map the monitoring GRC registers using window 3 */
        for (i = 0; i < 4; i++) {
                u32 reg = fw_health->regs[i];
                        return -ERANGE;
                fw_health->mapped_regs[i] = BNXT_FW_HEALTH_WIN_OFF(reg);
        }
+       bp->fw_health->status_reliable = true;
        if (reg_base == 0xffffffff)
                return 0;
 
        if (rc)
                return rc;
 
-       if (!up)
+       if (!up) {
+               bnxt_inv_fw_health_reg(bp);
                return 0;
+       }
 
        if (flags & FUNC_DRV_IF_CHANGE_RESP_FLAGS_RESC_CHANGE)
                resc_reinit = true;
        if (flags & FUNC_DRV_IF_CHANGE_RESP_FLAGS_HOT_FW_RESET_DONE)
                fw_reset = true;
+       else if (bp->fw_health && !bp->fw_health->status_reliable)
+               bnxt_try_map_fw_health_reg(bp);
 
        if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state) && !fw_reset) {
                netdev_err(bp->dev, "RESET_DONE not set during FW reset.\n");
                bnxt_queue_fw_reset_work(bp, bp->fw_reset_min_dsecs * HZ / 10);
                return;
        case BNXT_FW_RESET_STATE_ENABLE_DEV:
+               bnxt_inv_fw_health_reg(bp);
                if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state)) {
                        u32 val;