drm: Nuke fb->pixel_format

Replace uses of fb->pixel_format with fb->format->format.
Less duplicated information is a good thing.

Note that coccinelle failed to eliminate the
"/* fourcc format */" comment from drm_framebuffer.h, so I had
to do that part manually.

@@
struct drm_framebuffer *FB;
expression E;
@@
 drm_helper_mode_fill_fb_struct(...) {
	...
-	FB->pixel_format = E;
	...
 }

@@
struct drm_framebuffer *FB;
expression E;
@@
 i9xx_get_initial_plane_config(...) {
	...
-	FB->pixel_format = E;
	...
 }

@@
struct drm_framebuffer *FB;
expression E;
@@
 ironlake_get_initial_plane_config(...) {
	...
-	FB->pixel_format = E;
	...
 }

@@
struct drm_framebuffer *FB;
expression E;
@@
 skylake_get_initial_plane_config(...) {
	...
-	FB->pixel_format = E;
	...
 }

@@
struct drm_framebuffer *a;
struct drm_framebuffer b;
@@
(
- a->pixel_format
+ a->format->format
|
- b.pixel_format
+ b.format->format
)

@@
struct drm_plane_state *a;
struct drm_plane_state b;
@@
(
- a->fb->pixel_format
+ a->fb->format->format
|
- b.fb->pixel_format
+ b.fb->format->format
)

@@
struct drm_crtc *CRTC;
@@
(
- CRTC->primary->fb->pixel_format
+ CRTC->primary->fb->format->format
|
- CRTC->primary->state->fb->pixel_format
+ CRTC->primary->state->fb->format->format
)

@@
struct drm_mode_set *set;
@@
(
- set->fb->pixel_format
+ set->fb->format->format
|
- set->crtc->primary->fb->pixel_format
+ set->crtc->primary->fb->format->format
)

@@
@@
 struct drm_framebuffer {
	 ...
-	 uint32_t pixel_format;
	 ...
 };

v2: Fix commit message (Laurent)
    Rebase due to earlier removal of many fb->pixel_format uses,
    including the 'fb->format = drm_format_info(fb->format->format);'
    snafu
v3: Adjusted the semantic patch a bit and regenerated due to code
    changes

Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1481751175-18463-1-git-send-email-ville.syrjala@linux.intel.com

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 8d0ff1c8db8e0a5506fb2348295ff55a48c23e3b..84afaae97e659cb129779619495891e0b52875cf 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2072,7 +2072,7 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
 
        pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
 
-       switch (target_fb->pixel_format) {
+       switch (target_fb->format->format) {
        case DRM_FORMAT_C8:
                fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 0);
                fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0);
@@ -2145,7 +2145,7 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
                break;
        default:
                DRM_ERROR("Unsupported screen format %s\n",
-                         drm_get_format_name(target_fb->pixel_format, &format_name));
+                         drm_get_format_name(target_fb->format->format, &format_name));
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index c25edecb46d4db17d503566cdeca843d31eb1929..7a7fa96d2e4990d75c7a6a9c5bdd85f4aa79101b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2053,7 +2053,7 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
 
        pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
 
-       switch (target_fb->pixel_format) {
+       switch (target_fb->format->format) {
        case DRM_FORMAT_C8:
                fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 0);
                fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0);
@@ -2126,7 +2126,7 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
                break;
        default:
                DRM_ERROR("Unsupported screen format %s\n",
-                         drm_get_format_name(target_fb->pixel_format, &format_name));
+                         drm_get_format_name(target_fb->format->format, &format_name));
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index ffd20f90788c6429290e8ad497de89bd7adf7703..59eff6e9a883e6ce3cc831a154226bc5c37173ca 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -1501,7 +1501,7 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
        amdgpu_bo_get_tiling_flags(abo, &tiling_flags);
        amdgpu_bo_unreserve(abo);
 
-       switch (target_fb->pixel_format) {
+       switch (target_fb->format->format) {
        case DRM_FORMAT_C8:
                fb_format = (GRPH_DEPTH(GRPH_DEPTH_8BPP) |
                             GRPH_FORMAT(GRPH_FORMAT_INDEXED));
@@ -1567,7 +1567,7 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
                break;
        default:
                DRM_ERROR("Unsupported screen format %s\n",
-                         drm_get_format_name(target_fb->pixel_format, &format_name));
+                         drm_get_format_name(target_fb->format->format, &format_name));
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index e6f446af381814fd3b264aa254541fbc6e5a74c3..8de832dd981d3622f9c04f424725b5aa8839e523 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -1950,7 +1950,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
 
        pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
 
-       switch (target_fb->pixel_format) {
+       switch (target_fb->format->format) {
        case DRM_FORMAT_C8:
                fb_format = ((GRPH_DEPTH_8BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) |
                             (GRPH_FORMAT_INDEXED << GRPH_CONTROL__GRPH_FORMAT__SHIFT));
@@ -2016,7 +2016,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
                break;
        default:
                DRM_ERROR("Unsupported screen format %s\n",
-                         drm_get_format_name(target_fb->pixel_format, &format_name));
+                         drm_get_format_name(target_fb->format->format, &format_name));
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c b/drivers/gpu/drm/arc/arcpgu_crtc.c
index 5c26c5f126a3726503aab5a0d241e21a641538c6..ad9a95916f1f8c06ced45d4a45634042cd697316 100644 (file)
--- a/drivers/gpu/drm/arc/arcpgu_crtc.c
+++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
@@ -36,7 +36,7 @@ static void arc_pgu_set_pxl_fmt(struct drm_crtc *crtc)
 {
        struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
        const struct drm_framebuffer *fb = crtc->primary->state->fb;
-       uint32_t pixel_format = fb->pixel_format;
+       uint32_t pixel_format = fb->format->format;
        struct simplefb_format *format = NULL;
        int i;
 

diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
index ecdcd99c92cc5c74b7171dd2c9159f841af15655..20ebfb4fbdfa39e7a97743a4e33ee3c8113b22e2 100644 (file)
--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
+++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
@@ -65,7 +65,7 @@ static int hdlcd_set_pxl_fmt(struct drm_crtc *crtc)
        struct simplefb_format *format = NULL;
        int i;
 
-       pixel_format = fb->pixel_format;
+       pixel_format = fb->format->format;
 
        for (i = 0; i < ARRAY_SIZE(supported_formats); i++) {
                if (supported_formats[i].fourcc == pixel_format)

diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c
index 533ee2fa64be7e003ab80b659d54983ed4374c3d..eff2fe47e26a71fad70c7c681de43dcc2fcfadd8 100644 (file)
--- a/drivers/gpu/drm/arm/malidp_planes.c
+++ b/drivers/gpu/drm/arm/malidp_planes.c
@@ -112,7 +112,7 @@ static int malidp_de_plane_check(struct drm_plane *plane,
        fb = state->fb;
 
        ms->format = malidp_hw_get_format_id(&mp->hwdev->map, mp->layer->id,
-                                           fb->pixel_format);
+                                           fb->format->format);
        if (ms->format == MALIDP_INVALID_FORMAT_ID)
                return -EINVAL;
 
@@ -137,8 +137,8 @@ static int malidp_de_plane_check(struct drm_plane *plane,
 
        /* packed RGB888 / BGR888 can't be rotated or flipped */
        if (state->rotation != DRM_ROTATE_0 &&
-           (fb->pixel_format == DRM_FORMAT_RGB888 ||
-            fb->pixel_format == DRM_FORMAT_BGR888))
+           (fb->format->format == DRM_FORMAT_RGB888 ||
+            fb->format->format == DRM_FORMAT_BGR888))
                return -EINVAL;
 
        ms->rotmem_size = 0;
@@ -147,7 +147,7 @@ static int malidp_de_plane_check(struct drm_plane *plane,
 
                val = mp->hwdev->rotmem_required(mp->hwdev, state->crtc_h,
                                                 state->crtc_w,
-                                                fb->pixel_format);
+                                                fb->format->format);
                if (val < 0)
                        return val;
 

diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c
index 426e86f4cf96fbeec164ce342f4d7be8976b1951..41fc6ee9da91720a81c8de1ec2be909f1ef96ffe 100644 (file)
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -1035,7 +1035,7 @@ static int armada_drm_crtc_page_flip(struct drm_crtc *crtc,
        int ret;
 
        /* We don't support changing the pixel format */
-       if (fb->pixel_format != crtc->primary->fb->pixel_format)
+       if (fb->format->format != crtc->primary->fb->format->format)
                return -EINVAL;
 
        work = kmalloc(sizeof(*work), GFP_KERNEL);

diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c
index a0883a1b338722ec789e3b4f951d3aff8657e1c8..34cb73d0db77b2ab7cb06e26942b40091338da6b 100644 (file)
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -186,7 +186,7 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
 
                armada_drm_plane_calc_addrs(addrs, fb, src_x, src_y);
 
-               pixel_format = fb->pixel_format;
+               pixel_format = fb->format->format;
                hsub = drm_format_horz_chroma_subsampling(pixel_format);
                num_planes = fb->format->num_planes;
 

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
index 3e00512ef187eb57060da150e859399b35dbf00d..bd2791c4b0027c2cf15df5c0eb0add426499b2b1 100644 (file)
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
@@ -356,7 +356,7 @@ atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,
                cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |
                       ATMEL_HLCDC_LAYER_ITER;
 
-               if (atmel_hlcdc_format_embeds_alpha(state->base.fb->pixel_format))
+               if (atmel_hlcdc_format_embeds_alpha(state->base.fb->format->format))
                        cfg |= ATMEL_HLCDC_LAYER_LAEN;
                else
                        cfg |= ATMEL_HLCDC_LAYER_GAEN |
@@ -386,13 +386,13 @@ static void atmel_hlcdc_plane_update_format(struct atmel_hlcdc_plane *plane,
        u32 cfg;
        int ret;
 
-       ret = atmel_hlcdc_format_to_plane_mode(state->base.fb->pixel_format,
+       ret = atmel_hlcdc_format_to_plane_mode(state->base.fb->format->format,
                                               &cfg);
        if (ret)
                return;
 
-       if ((state->base.fb->pixel_format == DRM_FORMAT_YUV422 ||
-            state->base.fb->pixel_format == DRM_FORMAT_NV61) &&
+       if ((state->base.fb->format->format == DRM_FORMAT_YUV422 ||
+            state->base.fb->format->format == DRM_FORMAT_NV61) &&
            drm_rotation_90_or_270(state->base.rotation))
                cfg |= ATMEL_HLCDC_YUV422ROT;
 
@@ -405,7 +405,7 @@ static void atmel_hlcdc_plane_update_format(struct atmel_hlcdc_plane *plane,
         * Rotation optimization is not working on RGB888 (rotation is still
         * working but without any optimization).
         */
-       if (state->base.fb->pixel_format == DRM_FORMAT_RGB888)
+       if (state->base.fb->format->format == DRM_FORMAT_RGB888)
                cfg = ATMEL_HLCDC_LAYER_DMA_ROTDIS;
        else
                cfg = 0;
@@ -514,7 +514,7 @@ atmel_hlcdc_plane_prepare_disc_area(struct drm_crtc_state *c_state)
                ovl_state = drm_plane_state_to_atmel_hlcdc_plane_state(ovl_s);
 
                if (!ovl_s->fb ||
-                   atmel_hlcdc_format_embeds_alpha(ovl_s->fb->pixel_format) ||
+                   atmel_hlcdc_format_embeds_alpha(ovl_s->fb->format->format) ||
                    ovl_state->alpha != 255)
                        continue;
 
@@ -664,8 +664,8 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
        patched_src_h = DIV_ROUND_CLOSEST(patched_crtc_h * state->src_h,
                                          state->crtc_h);
 
-       hsub = drm_format_horz_chroma_subsampling(fb->pixel_format);
-       vsub = drm_format_vert_chroma_subsampling(fb->pixel_format);
+       hsub = drm_format_horz_chroma_subsampling(fb->format->format);
+       vsub = drm_format_vert_chroma_subsampling(fb->format->format);
 
        for (i = 0; i < state->nplanes; i++) {
                unsigned int offset = 0;
@@ -741,7 +741,7 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
 
        if ((state->crtc_h != state->src_h || state->crtc_w != state->src_w) &&
            (!layout->memsize ||
-            atmel_hlcdc_format_embeds_alpha(state->base.fb->pixel_format)))
+            atmel_hlcdc_format_embeds_alpha(state->base.fb->format->format)))
                return -EINVAL;
 
        if (state->crtc_x < 0 || state->crtc_y < 0)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 62f0f57728e1399372a11720663e069215792067..b602faf283676650c682b6a1100669d4aed9d4fc 100644 (file)
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -902,11 +902,11 @@ static int drm_atomic_plane_check(struct drm_plane *plane,
        }
 
        /* Check whether this plane supports the fb pixel format. */
-       ret = drm_plane_check_pixel_format(plane, state->fb->pixel_format);
+       ret = drm_plane_check_pixel_format(plane, state->fb->format->format);
        if (ret) {
                struct drm_format_name_buf format_name;
                DRM_DEBUG_ATOMIC("Invalid pixel format %s\n",
-                                drm_get_format_name(state->fb->pixel_format,
+                                drm_get_format_name(state->fb->format->format,
                                                     &format_name));
                return ret;
        }
@@ -964,7 +964,7 @@ static void drm_atomic_plane_print_state(struct drm_printer *p,
                struct drm_format_name_buf format_name;
 
                drm_printf(p, "\t\tformat=%s\n",
-                             drm_get_format_name(fb->pixel_format, &format_name));
+                             drm_get_format_name(fb->format->format, &format_name));
                drm_printf(p, "\t\t\tmodifier=0x%llx\n", fb->modifier);
                drm_printf(p, "\t\tsize=%dx%d\n", fb->width, fb->height);
                drm_printf(p, "\t\tlayers:\n");

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 14c58072651b9da7c5d8af094a0d2a3b9acef80c..080c8d361f1fc8917d8e84963625e41d9559a91a 100644 (file)
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -575,11 +575,11 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
                 */
                if (!crtc->primary->format_default) {
                        ret = drm_plane_check_pixel_format(crtc->primary,
-                                                          fb->pixel_format);
+                                                          fb->format->format);
                        if (ret) {
                                struct drm_format_name_buf format_name;
                                DRM_DEBUG_KMS("Invalid pixel format %s\n",
-                                             drm_get_format_name(fb->pixel_format,
+                                             drm_get_format_name(fb->format->format,
                                                                  &format_name));
                                goto out;
                        }

diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 5d2cb138eba64b562a880d8a9f77a2a6054e79eb..94bce0b462aa2faaa202e48729b59ee35b9d650c 100644 (file)
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -588,8 +588,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
                if (set->crtc->primary->fb == NULL) {
                        DRM_DEBUG_KMS("crtc has no fb, full mode set\n");
                        mode_changed = true;
-               } else if (set->fb->pixel_format !=
-                          set->crtc->primary->fb->pixel_format) {
+               } else if (set->fb->format->format !=
+                          set->crtc->primary->fb->format->format) {
                        mode_changed = true;
                } else
                        fb_changed = true;

diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c b/drivers/gpu/drm/drm_fb_cma_helper.c
index 181a9eafe34a7760ecc24e9a7ce1f6adcda9bd69..aab4465307ed2a47f865f11c30e80d903d9a92b6 100644 (file)
--- a/drivers/gpu/drm/drm_fb_cma_helper.c
+++ b/drivers/gpu/drm/drm_fb_cma_helper.c
@@ -307,7 +307,7 @@ static void drm_fb_cma_describe(struct drm_framebuffer *fb, struct seq_file *m)
        int i;
 
        seq_printf(m, "fb: %dx%d@%4.4s\n", fb->width, fb->height,
-                       (char *)&fb->pixel_format);
+                       (char *)&fb->format->format);
 
        for (i = 0; i < fb->fomat->num_planes; i++) {
                seq_printf(m, "   %d: offset=%d pitch=%d, obj: ",

diff --git a/drivers/gpu/drm/drm_modeset_helper.c b/drivers/gpu/drm/drm_modeset_helper.c
index 3c44409244dc51ad779165ecd4281ca9ab2ad584..639e474e7d43dbbf25a3892702d573e2ce9ba9b1 100644 (file)
--- a/drivers/gpu/drm/drm_modeset_helper.c
+++ b/drivers/gpu/drm/drm_modeset_helper.c
@@ -94,7 +94,6 @@ void drm_helper_mode_fill_fb_struct(struct drm_device *dev,
                fb->offsets[i] = mode_cmd->offsets[i];
        }
        fb->modifier = mode_cmd->modifier[0];
-       fb->pixel_format = mode_cmd->pixel_format;
        fb->flags = mode_cmd->flags;
 }
 EXPORT_SYMBOL(drm_helper_mode_fill_fb_struct);

diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index c2dc8e6f80ff3c36e0d838c55618eb813291c154..f479cda5fc2da185d78ba1c88156fb487161acd8 100644 (file)
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -482,11 +482,11 @@ static int __setplane_internal(struct drm_plane *plane,
        }
 
        /* Check whether this plane supports the fb pixel format. */
-       ret = drm_plane_check_pixel_format(plane, fb->pixel_format);
+       ret = drm_plane_check_pixel_format(plane, fb->format->format);
        if (ret) {
                struct drm_format_name_buf format_name;
                DRM_DEBUG_KMS("Invalid pixel format %s\n",
-                             drm_get_format_name(fb->pixel_format,
+                             drm_get_format_name(fb->format->format,
                                                  &format_name));
                goto out;
        }
@@ -858,7 +858,7 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
        if (ret)
                goto out;
 
-       if (crtc->primary->fb->pixel_format != fb->pixel_format) {
+       if (crtc->primary->fb->format->format != fb->format->format) {
                DRM_DEBUG_KMS("Page flip is not allowed to change frame buffer format.\n");
                ret = -EINVAL;
                goto out;

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index e8ce4a31858678aad4f9851d2ba485f9894a7afc..c5c01628c715a7a63163d9d6c53e3f14b6829a03 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -200,7 +200,7 @@ static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win,
        val = readl(ctx->addr + DECON_WINCONx(win));
        val &= ~WINCONx_BPPMODE_MASK;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_XRGB1555:
                val |= WINCONx_BPPMODE_16BPP_I1555;
                val |= WINCONx_HAWSWP_F;

diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 58dc9a5196bcaece92fe5b83bc30e1355bbb25cd..f9ab19e205e243d931412257064455582747e92a 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -281,7 +281,7 @@ static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win,
        val = readl(ctx->regs + WINCON(win));
        val &= ~WINCONx_BPPMODE_MASK;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_RGB565:
                val |= WINCONx_BPPMODE_16BPP_565;
                val |= WINCONx_BURSTLEN_16WORD;

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 0029065979b8b2531accaafb7de5e4037558a35f..745cfbdf6b399f83ae299928a8957d47aeeb0ca2 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -804,7 +804,7 @@ static void fimd_update_plane(struct exynos_drm_crtc *crtc,
                DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
        }
 
-       fimd_win_set_pixfmt(ctx, win, fb->pixel_format, state->src.w);
+       fimd_win_set_pixfmt(ctx, win, fb->format->format, state->src.w);
 
        /* hardware window 0 doesn't support color key. */
        if (win != 0)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index b313e61aab6549850ba0e32c4c5625cfe68e697c..a106046e0c93a31165a8aa0dc8a74fcf1a35b027 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -485,7 +485,7 @@ static void vp_video_buffer(struct mixer_context *ctx,
        bool crcb_mode = false;
        u32 val;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_NV12:
                crcb_mode = false;
                break;
@@ -494,7 +494,7 @@ static void vp_video_buffer(struct mixer_context *ctx,
                break;
        default:
                DRM_ERROR("pixel format for vp is wrong [%d].\n",
-                               fb->pixel_format);
+                               fb->format->format);
                return;
        }
 
@@ -597,7 +597,7 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
        unsigned int fmt;
        u32 val;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_XRGB4444:
        case DRM_FORMAT_ARGB4444:
                fmt = MXR_FORMAT_ARGB4444;
@@ -681,7 +681,7 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
        mixer_cfg_scan(ctx, mode->vdisplay);
        mixer_cfg_rgb_fmt(ctx, mode->vdisplay);
        mixer_cfg_layer(ctx, win, priority, true);
-       mixer_cfg_gfx_blend(ctx, win, is_alpha_format(fb->pixel_format));
+       mixer_cfg_gfx_blend(ctx, win, is_alpha_format(fb->format->format));
 
        /* layer update mandatory for mixer 16.0.33.0 */
        if (ctx->mxr_ver == MXR_VER_16_0_33_0 ||

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
index a99f4884742058ab6820b8f9cd5e086326caabb5..0a20723aa6e17194b08940beef9c211299a30455 100644 (file)
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
@@ -44,7 +44,7 @@ static int fsl_dcu_drm_plane_atomic_check(struct drm_plane *plane,
        if (!state->fb || !state->crtc)
                return 0;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_RGB565:
        case DRM_FORMAT_RGB888:
        case DRM_FORMAT_XRGB8888:
@@ -96,7 +96,7 @@ static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane,
 
        gem = drm_fb_cma_get_gem_obj(fb, 0);
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_RGB565:
                bpp = FSL_DCU_RGB565;
                break;

diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
index 3ea70459b901afa67cb92348b8844a173240a47c..307d460ab684184b3028aa6ef956ca6233f99a79 100644 (file)
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
@@ -617,7 +617,7 @@ static void ade_rdma_set(void __iomem *base, struct drm_framebuffer *fb,
                         ch + 1, y, in_h, stride, (u32)obj->paddr);
        DRM_DEBUG_DRIVER("addr=0x%x, fb:%dx%d, pixel_format=%d(%s)\n",
                         addr, fb->width, fb->height, fmt,
-                        drm_get_format_name(fb->pixel_format, &format_name));
+                        drm_get_format_name(fb->format->format, &format_name));
 
        /* get reg offset */
        reg_ctrl = RD_CH_CTRL(ch);
@@ -773,7 +773,7 @@ static void ade_update_channel(struct ade_plane *aplane,
 {
        struct ade_hw_ctx *ctx = aplane->ctx;
        void __iomem *base = ctx->base;
-       u32 fmt = ade_get_format(fb->pixel_format);
+       u32 fmt = ade_get_format(fb->format->format);
        u32 ch = aplane->ch;
        u32 in_w;
        u32 in_h;
@@ -835,7 +835,7 @@ static int ade_plane_atomic_check(struct drm_plane *plane,
        if (!crtc || !fb)
                return 0;
 
-       fmt = ade_get_format(fb->pixel_format);
+       fmt = ade_get_format(fb->format->format);
        if (fmt == ADE_FORMAT_UNSUPPORT)
                return -EINVAL;
 

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index ec462dae46bca026d88347823864557a3c6fc00e..b77b53b47acceb98711a5aba48858238fbaa3af0 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3021,7 +3021,8 @@ static void intel_plane_info(struct seq_file *m, struct intel_crtc *intel_crtc)
                state = plane->state;
 
                if (state->fb) {
-                       drm_get_format_name(state->fb->pixel_format, &format_name);
+                       drm_get_format_name(state->fb->format->format,
+                                           &format_name);
                } else {
                        sprintf(format_name.str, "N/A");
                }

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index dbe9fb41ae535449f996ab36e51bd626be6651fc..e049838159a1787844ff573bcdd537c53672faf1 100644 (file)
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -155,11 +155,11 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
                 * RGB 16-bit 5:6:5, and Indexed 8-bit.
                 * TBD: Add RGB64 case once its added in supported format list.
                 */
-               switch (state->fb->pixel_format) {
+               switch (state->fb->format->format) {
                case DRM_FORMAT_C8:
                case DRM_FORMAT_RGB565:
                        DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",
-                                     drm_get_format_name(state->fb->pixel_format,
+                                     drm_get_format_name(state->fb->format->format,
                                                          &format_name));
                        return -EINVAL;
 

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4f0675460336934274935e16921177aa0d466409..3b56b2cae8045eed74dfab8ee1e8b2db5965c83e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2455,7 +2455,7 @@ u32 intel_compute_tile_offset(int *x, int *y,
        u32 alignment;
 
        /* AUX_DIST needs only 4K alignment */
-       if (fb->pixel_format == DRM_FORMAT_NV12 && plane == 1)
+       if (fb->format->format == DRM_FORMAT_NV12 && plane == 1)
                alignment = 4096;
        else
                alignment = intel_surf_alignment(dev_priv, fb->modifier);
@@ -2700,7 +2700,7 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
        if (plane_config->tiling == I915_TILING_X)
                obj->tiling_and_stride = fb->pitches[0] | I915_TILING_X;
 
-       mode_cmd.pixel_format = fb->pixel_format;
+       mode_cmd.pixel_format = fb->format->format;
        mode_cmd.width = fb->width;
        mode_cmd.height = fb->height;
        mode_cmd.pitches[0] = fb->pitches[0];
@@ -2976,7 +2976,7 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state)
         * Handle the AUX surface first since
         * the main surface setup depends on it.
         */
-       if (fb->pixel_format == DRM_FORMAT_NV12) {
+       if (fb->format->format == DRM_FORMAT_NV12) {
                ret = skl_check_nv12_aux_surface(plane_state);
                if (ret)
                        return ret;
@@ -3031,7 +3031,7 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
                I915_WRITE(PRIMCNSTALPHA(plane), 0);
        }
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_C8:
                dspcntr |= DISPPLANE_8BPP;
                break;
@@ -3146,7 +3146,7 @@ static void ironlake_update_primary_plane(struct drm_plane *primary,
        if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
                dspcntr |= DISPPLANE_PIPE_CSC_ENABLE;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_C8:
                dspcntr |= DISPPLANE_8BPP;
                break;
@@ -3282,7 +3282,7 @@ u32 skl_plane_stride(const struct drm_framebuffer *fb, int plane,
                stride /= intel_tile_height(dev_priv, fb->modifier, cpp);
        } else {
                stride /= intel_fb_stride_alignment(dev_priv, fb->modifier,
-                                                   fb->pixel_format);
+                                                   fb->format->format);
        }
 
        return stride;
@@ -3396,7 +3396,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
                    PLANE_CTL_PIPE_GAMMA_ENABLE |
                    PLANE_CTL_PIPE_CSC_ENABLE;
 
-       plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+       plane_ctl |= skl_plane_ctl_format(fb->format->format);
        plane_ctl |= skl_plane_ctl_tiling(fb->modifier);
        plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;
        plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -4768,7 +4768,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
        }
 
        /* Check src format */
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_RGB565:
        case DRM_FORMAT_XBGR8888:
        case DRM_FORMAT_XRGB8888:
@@ -4784,7 +4784,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
        default:
                DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
                              intel_plane->base.base.id, intel_plane->base.name,
-                             fb->base.id, fb->pixel_format);
+                             fb->base.id, fb->format->format);
                return -EINVAL;
        }
 
@@ -8714,7 +8714,6 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
 
        pixel_format = val & DISPPLANE_PIXFORMAT_MASK;
        fourcc = i9xx_format_to_fourcc(pixel_format);
-       fb->pixel_format = fourcc;
        fb->format = drm_format_info(fourcc);
 
        if (INTEL_GEN(dev_priv) >= 4) {
@@ -8736,7 +8735,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
        fb->pitches[0] = val & 0xffffffc0;
 
        aligned_height = intel_fb_align_height(dev, fb->height,
-                                              fb->pixel_format,
+                                              fb->format->format,
                                               fb->modifier);
 
        plane_config->size = fb->pitches[0] * aligned_height;
@@ -9745,7 +9744,6 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
        fourcc = skl_format_to_fourcc(pixel_format,
                                      val & PLANE_CTL_ORDER_RGBX,
                                      val & PLANE_CTL_ALPHA_MASK);
-       fb->pixel_format = fourcc;
        fb->format = drm_format_info(fourcc);
 
        tiling = val & PLANE_CTL_TILED_MASK;
@@ -9779,11 +9777,11 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
 
        val = I915_READ(PLANE_STRIDE(pipe, 0));
        stride_mult = intel_fb_stride_alignment(dev_priv, fb->modifier,
-                                               fb->pixel_format);
+                                               fb->format->format);
        fb->pitches[0] = (val & 0x3ff) * stride_mult;
 
        aligned_height = intel_fb_align_height(dev, fb->height,
-                                              fb->pixel_format,
+                                              fb->format->format,
                                               fb->modifier);
 
        plane_config->size = fb->pitches[0] * aligned_height;
@@ -9860,7 +9858,6 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
 
        pixel_format = val & DISPPLANE_PIXFORMAT_MASK;
        fourcc = i9xx_format_to_fourcc(pixel_format);
-       fb->pixel_format = fourcc;
        fb->format = drm_format_info(fourcc);
 
        base = I915_READ(DSPSURF(pipe)) & 0xfffff000;
@@ -9882,7 +9879,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
        fb->pitches[0] = val & 0xffffffc0;
 
        aligned_height = intel_fb_align_height(dev, fb->height,
-                                              fb->pixel_format,
+                                              fb->format->format,
                                               fb->modifier);
 
        plane_config->size = fb->pitches[0] * aligned_height;
@@ -12150,7 +12147,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
                return -EBUSY;
 
        /* Can't change pixel format via MI display flips. */
-       if (fb->pixel_format != crtc->primary->fb->pixel_format)
+       if (fb->format->format != crtc->primary->fb->format->format)
                return -EINVAL;
 
        /*
@@ -12847,7 +12844,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
                DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d, fb = %ux%u format = %s\n",
                              plane->base.id, plane->name,
                              fb->base.id, fb->width, fb->height,
-                             drm_get_format_name(fb->pixel_format, &format_name));
+                             drm_get_format_name(fb->format->format, &format_name));
                if (INTEL_GEN(dev_priv) >= 9)
                        DRM_DEBUG_KMS("\tscaler:%d src %dx%d+%d+%d dst %dx%d+%d+%d\n",
                                      state->scaler_id,

diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index 3f60a4f6f078b3f830a8900fc793d95cb3404f18..570c07d59d1ac4f7959f934bed671cdc609adf13 100644 (file)
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -632,7 +632,7 @@ static bool intel_fbdev_init_bios(struct drm_device *dev,
 
                cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay;
                cur_size = intel_fb_align_height(dev, cur_size,
-                                                fb->base.pixel_format,
+                                                fb->base.format->format,
                                                 fb->base.modifier);
                cur_size *= fb->base.pitches[0];
                DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n",

diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index ce3667c18e1864d70dbaf47ea00a7426a691a55e..568d194435fdfbceca29d59123efb61f76ac6fba 100644 (file)
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -667,7 +667,7 @@ static void update_colorkey(struct intel_overlay *overlay,
        if (overlay->color_key_enabled)
                flags |= DST_KEY_ENABLE;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_C8:
                key = 0;
                flags |= CLK_RGB8I_MASK;

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f6406ebd533c8d9195126340d15a28b07983ba0e..ce03d9d5aca6c9f425ed555e7b51a047c39ffb47 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3241,7 +3241,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
                return 0;
 
        fb = pstate->fb;
-       format = fb->pixel_format;
+       format = fb->format->format;
 
        if (pstate->plane->type == DRM_PLANE_TYPE_CURSOR)
                return 0;
@@ -3330,7 +3330,7 @@ skl_ddb_min_alloc(const struct drm_plane_state *pstate,
                return 0;
 
        /* For packed formats, no y-plane, return 0 */
-       if (y && fb->pixel_format != DRM_FORMAT_NV12)
+       if (y && fb->format->format != DRM_FORMAT_NV12)
                return 0;
 
        /* For Non Y-tile return 8-blocks */
@@ -3345,12 +3345,12 @@ skl_ddb_min_alloc(const struct drm_plane_state *pstate,
                swap(src_w, src_h);
 
        /* Halve UV plane width and height for NV12 */
-       if (fb->pixel_format == DRM_FORMAT_NV12 && !y) {
+       if (fb->format->format == DRM_FORMAT_NV12 && !y) {
                src_w /= 2;
                src_h /= 2;
        }
 
-       if (fb->pixel_format == DRM_FORMAT_NV12 && !y)
+       if (fb->format->format == DRM_FORMAT_NV12 && !y)
                plane_bpp = fb->format->cpp[1];
        else
                plane_bpp = fb->format->cpp[0];
@@ -3617,7 +3617,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
        plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate, intel_pstate);
 
        if (drm_rotation_90_or_270(pstate->rotation)) {
-               int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ?
+               int cpp = (fb->format->format == DRM_FORMAT_NV12) ?
                        fb->format->cpp[1] :
                        fb->format->cpp[0];
 

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index b46c1794d3ac3588ae24fa3c1d9037620022e35f..ff766c0cb873838ab3be991c521cfb69939468a5 100644 (file)
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -223,7 +223,7 @@ skl_update_plane(struct drm_plane *drm_plane,
                PLANE_CTL_PIPE_GAMMA_ENABLE |
                PLANE_CTL_PIPE_CSC_ENABLE;
 
-       plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+       plane_ctl |= skl_plane_ctl_format(fb->format->format);
        plane_ctl |= skl_plane_ctl_tiling(fb->modifier);
 
        plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -357,7 +357,7 @@ vlv_update_plane(struct drm_plane *dplane,
 
        sprctl = SP_ENABLE;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_YUYV:
                sprctl |= SP_FORMAT_YUV422 | SP_YUV_ORDER_YUYV;
                break;
@@ -443,7 +443,7 @@ vlv_update_plane(struct drm_plane *dplane,
                sprctl |= SP_SOURCE_KEY;
 
        if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
-               chv_update_csc(intel_plane, fb->pixel_format);
+               chv_update_csc(intel_plane, fb->format->format);
 
        I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);
        I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x);
@@ -502,7 +502,7 @@ ivb_update_plane(struct drm_plane *plane,
 
        sprctl = SPRITE_ENABLE;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_XBGR8888:
                sprctl |= SPRITE_FORMAT_RGBX888 | SPRITE_RGB_ORDER_RGBX;
                break;
@@ -640,7 +640,7 @@ ilk_update_plane(struct drm_plane *plane,
 
        dvscntr = DVS_ENABLE;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_XBGR8888:
                dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_XBGR;
                break;
@@ -866,7 +866,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
                src_y = src->y1 >> 16;
                src_h = drm_rect_height(src) >> 16;
 
-               if (format_is_yuv(fb->pixel_format)) {
+               if (format_is_yuv(fb->format->format)) {
                        src_x &= ~1;
                        src_w &= ~1;
 

diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index f44a836563109cae1ee1cc25c1b7a226fc3ba2e3..0b945f077344856553b3097490b00b94d694d625 100644 (file)
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -92,8 +92,8 @@ drm_plane_state_to_ubo(struct drm_plane_state *state)
        cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
        BUG_ON(!cma_obj);
 
-       x /= drm_format_horz_chroma_subsampling(fb->pixel_format);
-       y /= drm_format_vert_chroma_subsampling(fb->pixel_format);
+       x /= drm_format_horz_chroma_subsampling(fb->format->format);
+       y /= drm_format_vert_chroma_subsampling(fb->format->format);
 
        return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
               fb->format->cpp[1] * x - eba;
@@ -111,8 +111,8 @@ drm_plane_state_to_vbo(struct drm_plane_state *state)
        cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
        BUG_ON(!cma_obj);
 
-       x /= drm_format_horz_chroma_subsampling(fb->pixel_format);
-       y /= drm_format_vert_chroma_subsampling(fb->pixel_format);
+       x /= drm_format_horz_chroma_subsampling(fb->format->format);
+       y /= drm_format_vert_chroma_subsampling(fb->format->format);
 
        return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
               fb->format->cpp[2] * x - eba;
@@ -281,7 +281,7 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
         */
        if (old_fb && (state->src_w != old_state->src_w ||
                              state->src_h != old_state->src_h ||
-                             fb->pixel_format != old_fb->pixel_format))
+                             fb->format->format != old_fb->format->format))
                crtc_state->mode_changed = true;
 
        eba = drm_plane_state_to_eba(state);
@@ -295,7 +295,7 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
        if (old_fb && fb->pitches[0] != old_fb->pitches[0])
                crtc_state->mode_changed = true;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_YUV420:
        case DRM_FORMAT_YVU420:
        case DRM_FORMAT_YUV422:
@@ -315,7 +315,7 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
                if (vbo & 0x7 || vbo > 0xfffff8)
                        return -EINVAL;
 
-               if (old_fb && (fb->pixel_format == old_fb->pixel_format)) {
+               if (old_fb && (fb->format->format == old_fb->format->format)) {
                        old_vbo = drm_plane_state_to_vbo(old_state);
                        if (vbo != old_vbo)
                                crtc_state->mode_changed = true;
@@ -332,7 +332,7 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
                if (ubo & 0x7 || ubo > 0xfffff8)
                        return -EINVAL;
 
-               if (old_fb && (fb->pixel_format == old_fb->pixel_format)) {
+               if (old_fb && (fb->format->format == old_fb->format->format)) {
                        old_ubo = drm_plane_state_to_ubo(old_state);
                        if (ubo != old_ubo)
                                crtc_state->mode_changed = true;
@@ -348,8 +348,8 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
                 * The x/y offsets must be even in case of horizontal/vertical
                 * chroma subsampling.
                 */
-               hsub = drm_format_horz_chroma_subsampling(fb->pixel_format);
-               vsub = drm_format_vert_chroma_subsampling(fb->pixel_format);
+               hsub = drm_format_horz_chroma_subsampling(fb->format->format);
+               vsub = drm_format_vert_chroma_subsampling(fb->format->format);
                if (((state->src_x >> 16) & (hsub - 1)) ||
                    ((state->src_y >> 16) & (vsub - 1)))
                        return -EINVAL;
@@ -392,13 +392,13 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
                ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
                break;
        case IPU_DP_FLOW_SYNC_FG:
-               ics = ipu_drm_fourcc_to_colorspace(state->fb->pixel_format);
+               ics = ipu_drm_fourcc_to_colorspace(state->fb->format->format);
                ipu_dp_setup_channel(ipu_plane->dp, ics,
                                        IPUV3_COLORSPACE_UNKNOWN);
                ipu_dp_set_window_pos(ipu_plane->dp, state->crtc_x,
                                        state->crtc_y);
                /* Enable local alpha on partial plane */
-               switch (state->fb->pixel_format) {
+               switch (state->fb->format->format) {
                case DRM_FORMAT_ARGB1555:
                case DRM_FORMAT_ABGR1555:
                case DRM_FORMAT_RGBA5551:
@@ -421,11 +421,11 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
        ipu_cpmem_zero(ipu_plane->ipu_ch);
        ipu_cpmem_set_resolution(ipu_plane->ipu_ch, state->src_w >> 16,
                                        state->src_h >> 16);
-       ipu_cpmem_set_fmt(ipu_plane->ipu_ch, state->fb->pixel_format);
+       ipu_cpmem_set_fmt(ipu_plane->ipu_ch, state->fb->format->format);
        ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
        ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
        ipu_cpmem_set_stride(ipu_plane->ipu_ch, state->fb->pitches[0]);
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_YUV420:
        case DRM_FORMAT_YVU420:
        case DRM_FORMAT_YUV422:
@@ -434,9 +434,9 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
        case DRM_FORMAT_YVU444:
                ubo = drm_plane_state_to_ubo(state);
                vbo = drm_plane_state_to_vbo(state);
-               if (fb->pixel_format == DRM_FORMAT_YVU420 ||
-                   fb->pixel_format == DRM_FORMAT_YVU422 ||
-                   fb->pixel_format == DRM_FORMAT_YVU444)
+               if (fb->format->format == DRM_FORMAT_YVU420 ||
+                   fb->format->format == DRM_FORMAT_YVU422 ||
+                   fb->format->format == DRM_FORMAT_YVU444)
                        swap(ubo, vbo);
 
                ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
index 71421923c592f4930399e4faa3aec45874f9e381..e405e89ed5e5dcb7b7bbe131a4e5dd19ac66fa4b 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
@@ -133,7 +133,7 @@ static void mtk_plane_atomic_update(struct drm_plane *plane,
        mtk_gem = to_mtk_gem_obj(gem);
        addr = mtk_gem->dma_addr;
        pitch = fb->pitches[0];
-       format = fb->pixel_format;
+       format = fb->format->format;
 
        addr += (plane->state->src.x1 >> 16) * fb->format->cpp[0];
        addr += (plane->state->src.y1 >> 16) * pitch;

diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
index 4942ca090b46fdfa1cf4b6193f3d66095804e02e..642b2fab42ff45341e7820b3765bdd5fa210c08c 100644 (file)
--- a/drivers/gpu/drm/meson/meson_plane.c
+++ b/drivers/gpu/drm/meson/meson_plane.c
@@ -113,7 +113,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
        if (meson_vpu_is_compatible(priv, "amlogic,meson-gxbb-vpu"))
                priv->viu.osd1_blk0_cfg[0] |= OSD_OUTPUT_COLOR_RGB;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_XRGB8888:
                /* For XRGB, replace the pixel's alpha by 0xFF */
                writel_bits_relaxed(OSD_REPLACE_EN, OSD_REPLACE_EN,

diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
index 911e4690d36af7274d2e4468c85fba568f152567..53619d07677e3f97c68c798800276941e3df844d 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
@@ -43,7 +43,7 @@ enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
        if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
                is_tile = true;
 
-       if (fb->pixel_format == DRM_FORMAT_NV12 && is_tile)
+       if (fb->format->format == DRM_FORMAT_NV12 && is_tile)
                return FRAME_TILE_YCBCR_420;
 
        return FRAME_LINEAR;

diff --git a/drivers/gpu/drm/msm/msm_fb.c b/drivers/gpu/drm/msm/msm_fb.c
index 0649863d7fd7b42ceac279036cad5ae80e448359..5cf165c9c3a9fe661f3c961e12d5f5ae340309fe 100644 (file)
--- a/drivers/gpu/drm/msm/msm_fb.c
+++ b/drivers/gpu/drm/msm/msm_fb.c
@@ -68,7 +68,7 @@ void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m)
        int i, n = fb->format->num_planes;
 
        seq_printf(m, "fb: %dx%d@%4.4s (%2d, ID:%d)\n",
-                       fb->width, fb->height, (char *)&fb->pixel_format,
+                       fb->width, fb->height, (char *)&fb->format->format,
                        drm_framebuffer_read_refcount(fb), fb->base.id);
 
        for (i = 0; i < n; i++) {

diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
index 081890336ce7d8eee40e5d4cc971210bd47bed2c..e10a4eda4078ba9b211ca49530da2b659865c8ee 100644 (file)
--- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
@@ -46,7 +46,7 @@ static int mxsfb_set_pixel_fmt(struct mxsfb_drm_private *mxsfb)
 {
        struct drm_crtc *crtc = &mxsfb->pipe.crtc;
        struct drm_device *drm = crtc->dev;
-       const u32 format = crtc->primary->state->fb->pixel_format;
+       const u32 format = crtc->primary->state->fb->format->format;
        u32 ctrl, ctrl1;
 
        ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER;

diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
index a79514d440b39a526cda9af5417556e697a73bdf..6275c270df25445cc08900586ab66b7e723ed833 100644 (file)
--- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
@@ -145,16 +145,16 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
        nvif_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x);
        nvif_wr32(dev, NV_PVIDEO_SIZE_OUT(flip), crtc_h << 16 | crtc_w);
 
-       if (fb->pixel_format != DRM_FORMAT_UYVY)
+       if (fb->format->format != DRM_FORMAT_UYVY)
                format |= NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8;
-       if (fb->pixel_format == DRM_FORMAT_NV12)
+       if (fb->format->format == DRM_FORMAT_NV12)
                format |= NV_PVIDEO_FORMAT_PLANAR;
        if (nv_plane->iturbt_709)
                format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709;
        if (nv_plane->colorkey & (1 << 24))
                format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY;
 
-       if (fb->pixel_format == DRM_FORMAT_NV12) {
+       if (fb->format->format == DRM_FORMAT_NV12) {
                nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0);
                nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip),
                        nv_fb->nvbo->bo.offset + fb->offsets[1]);
@@ -411,7 +411,7 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
 
        if (nv_plane->colorkey & (1 << 24))
                overlay |= 0x10;
-       if (fb->pixel_format == DRM_FORMAT_YUYV)
+       if (fb->format->format == DRM_FORMAT_YUYV)
                overlay |= 0x100;
 
        nvif_wr32(dev, NV_PVIDEO_OVERLAY, overlay);

diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index b617e5d3277a40ba530889655c1fc90e781b128f..cb85cb72dc1c30cb5114a3f31ecaf3b508e5aa22 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1153,7 +1153,7 @@ nv50_curs_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
        if (asyw->state.fb->width != asyw->state.fb->height)
                return -EINVAL;
 
-       switch (asyw->state.fb->pixel_format) {
+       switch (asyw->state.fb->format->format) {
        case DRM_FORMAT_ARGB8888: asyh->curs.format = 1; break;
        default:
                WARN_ON(1);
@@ -1438,7 +1438,7 @@ nv50_base_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
        asyh->base.w = asyw->state.fb->width;
        asyh->base.h = asyw->state.fb->height;
 
-       switch (fb->pixel_format) {
+       switch (fb->format->format) {
        case DRM_FORMAT_C8         : asyw->image.format = 0x1e; break;
        case DRM_FORMAT_RGB565     : asyw->image.format = 0xe8; break;
        case DRM_FORMAT_XRGB1555   :

diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c
index c6ef457b9fca08676a588eccb97a6b749455b605..bd6b94c38613f093ddbb2cf98835b35d552b83e9 100644 (file)
--- a/drivers/gpu/drm/omapdrm/omap_fb.c
+++ b/drivers/gpu/drm/omapdrm/omap_fb.c
@@ -346,7 +346,7 @@ void omap_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m)
        int i, n = fb->format->num_planes;
 
        seq_printf(m, "fb: %dx%d@%4.4s\n", fb->width, fb->height,
-                       (char *)&fb->pixel_format);
+                       (char *)&fb->format->format);
 
        for (i = 0; i < n; i++) {
                struct plane *plane = &omap_fb->planes[i];

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 0d7f84f7d71d774355931850d913ab39515aa275..3c492a0aa6bd4813ee3683c9fdff8aadb0cf5929 100644 (file)
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1195,7 +1195,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
        radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
        radeon_bo_unreserve(rbo);
 
-       switch (target_fb->pixel_format) {
+       switch (target_fb->format->format) {
        case DRM_FORMAT_C8:
                fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_8BPP) |
                             EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_INDEXED));
@@ -1261,7 +1261,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
                break;
        default:
                DRM_ERROR("Unsupported screen format %s\n",
-                         drm_get_format_name(target_fb->pixel_format, &format_name));
+                         drm_get_format_name(target_fb->format->format, &format_name));
                return -EINVAL;
        }
 
@@ -1511,7 +1511,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
        radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
        radeon_bo_unreserve(rbo);
 
-       switch (target_fb->pixel_format) {
+       switch (target_fb->format->format) {
        case DRM_FORMAT_C8:
                fb_format =
                    AVIVO_D1GRPH_CONTROL_DEPTH_8BPP |
@@ -1564,7 +1564,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
                break;
        default:
                DRM_ERROR("Unsupported screen format %s\n",
-                         drm_get_format_name(target_fb->pixel_format, &format_name));
+                         drm_get_format_name(target_fb->format->format, &format_name));
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
index a74f8ed8ca2e32b9260f8ce5f38baabe023e5f8f..dcde6288da6c9dabf4a340c9802c842b2e5f2d28 100644 (file)
--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
@@ -567,10 +567,10 @@ static int rcar_du_plane_atomic_check(struct drm_plane *plane,
                return -EINVAL;
        }
 
-       rstate->format = rcar_du_format_info(state->fb->pixel_format);
+       rstate->format = rcar_du_format_info(state->fb->format->format);
        if (rstate->format == NULL) {
                dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
-                       state->fb->pixel_format);
+                       state->fb->format->format);
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 83ebd162f3ef5eda15982e7fbe0abca4c8855503..b5bfbe50bd87167a7b28f528a74a034b1f68a738 100644 (file)
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -201,10 +201,10 @@ static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane,
                return -EINVAL;
        }
 
-       rstate->format = rcar_du_format_info(state->fb->pixel_format);
+       rstate->format = rcar_du_format_info(state->fb->format->format);
        if (rstate->format == NULL) {
                dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
-                       state->fb->pixel_format);
+                       state->fb->format->format);
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 50e085e742140e74f44fb6d33c3c1d21fc61fe0c..fb5f001f51c3ef039a57cb23183ac878861b357e 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -668,7 +668,7 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
        if (!state->visible)
                return 0;
 
-       ret = vop_convert_format(fb->pixel_format);
+       ret = vop_convert_format(fb->format->format);
        if (ret < 0)
                return ret;
 
@@ -676,7 +676,7 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
         * Src.x1 can be odd when do clip, but yuv plane start point
         * need align with 2 pixel.
         */
-       if (is_yuv_support(fb->pixel_format) && ((state->src.x1 >> 16) % 2))
+       if (is_yuv_support(fb->format->format) && ((state->src.x1 >> 16) % 2))
                return -EINVAL;
 
        return 0;
@@ -753,16 +753,16 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
        offset += (src->y1 >> 16) * fb->pitches[0];
        dma_addr = rk_obj->dma_addr + offset + fb->offsets[0];
 
-       format = vop_convert_format(fb->pixel_format);
+       format = vop_convert_format(fb->format->format);
 
        spin_lock(&vop->reg_lock);
 
        VOP_WIN_SET(vop, win, format, format);
        VOP_WIN_SET(vop, win, yrgb_vir, fb->pitches[0] >> 2);
        VOP_WIN_SET(vop, win, yrgb_mst, dma_addr);
-       if (is_yuv_support(fb->pixel_format)) {
-               int hsub = drm_format_horz_chroma_subsampling(fb->pixel_format);
-               int vsub = drm_format_vert_chroma_subsampling(fb->pixel_format);
+       if (is_yuv_support(fb->format->format)) {
+               int hsub = drm_format_horz_chroma_subsampling(fb->format->format);
+               int vsub = drm_format_vert_chroma_subsampling(fb->format->format);
                int bpp = fb->format->cpp[1];
 
                uv_obj = rockchip_fb_get_gem_obj(fb, 1);
@@ -779,16 +779,16 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
        if (win->phy->scl)
                scl_vop_cal_scl_fac(vop, win, actual_w, actual_h,
                                    drm_rect_width(dest), drm_rect_height(dest),
-                                   fb->pixel_format);
+                                   fb->format->format);
 
        VOP_WIN_SET(vop, win, act_info, act_info);
        VOP_WIN_SET(vop, win, dsp_info, dsp_info);
        VOP_WIN_SET(vop, win, dsp_st, dsp_st);
 
-       rb_swap = has_rb_swapped(fb->pixel_format);
+       rb_swap = has_rb_swapped(fb->format->format);
        VOP_WIN_SET(vop, win, rb_swap, rb_swap);
 
-       if (is_alpha_support(fb->pixel_format)) {
+       if (is_alpha_support(fb->format->format)) {
                VOP_WIN_SET(vop, win, dst_alpha_ctl,
                            DST_FACTOR_M0(ALPHA_SRC_INVERSE));
                val = SRC_ALPHA_EN(1) | SRC_COLOR_M0(ALPHA_SRC_PRE_MUL) |

diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
index dddbdd62bed0b62c0f980b338f29e3d4b9b04242..44547655169535991142cc6b164871f38c8c6146 100644 (file)
--- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
+++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
@@ -174,7 +174,7 @@ static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc)
        if (scrtc->started)
                return;
 
-       format = shmob_drm_format_info(crtc->primary->fb->pixel_format);
+       format = shmob_drm_format_info(crtc->primary->fb->format->format);
        if (WARN_ON(format == NULL))
                return;
 
@@ -376,10 +376,10 @@ static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc,
        const struct shmob_drm_format_info *format;
        void *cache;
 
-       format = shmob_drm_format_info(crtc->primary->fb->pixel_format);
+       format = shmob_drm_format_info(crtc->primary->fb->format->format);
        if (format == NULL) {
                dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n",
-                       crtc->primary->fb->pixel_format);
+                       crtc->primary->fb->format->format);
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/shmobile/shmob_drm_plane.c b/drivers/gpu/drm/shmobile/shmob_drm_plane.c
index 1805bb23b1134c732ff10a415f821106eddab6e4..2023a93cee2b40a925a9463588ce5f4c1268c579 100644 (file)
--- a/drivers/gpu/drm/shmobile/shmob_drm_plane.c
+++ b/drivers/gpu/drm/shmobile/shmob_drm_plane.c
@@ -183,10 +183,10 @@ shmob_drm_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
        struct shmob_drm_device *sdev = plane->dev->dev_private;
        const struct shmob_drm_format_info *format;
 
-       format = shmob_drm_format_info(fb->pixel_format);
+       format = shmob_drm_format_info(fb->format->format);
        if (format == NULL) {
                dev_dbg(sdev->dev, "update_plane: unsupported format %08x\n",
-                       fb->pixel_format);
+                       fb->format->format);
                return -EINVAL;
        }
 

diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c
index 58316bd6d7d6b2edeefe06a5bc4b7b04fc813a22..877d053d86f4ffb3225f212446537ebac1948f1f 100644 (file)
--- a/drivers/gpu/drm/sti/sti_gdp.c
+++ b/drivers/gpu/drm/sti/sti_gdp.c
@@ -636,10 +636,10 @@ static int sti_gdp_atomic_check(struct drm_plane *drm_plane,
        src_w = clamp_val(state->src_w >> 16, 0, GAM_GDP_SIZE_MAX);
        src_h = clamp_val(state->src_h >> 16, 0, GAM_GDP_SIZE_MAX);
 
-       format = sti_gdp_fourcc2format(fb->pixel_format);
+       format = sti_gdp_fourcc2format(fb->format->format);
        if (format == -1) {
                DRM_ERROR("Format not supported by GDP %.4s\n",
-                         (char *)&fb->pixel_format);
+                         (char *)&fb->format->format);
                return -EINVAL;
        }
 
@@ -745,7 +745,7 @@ static void sti_gdp_atomic_update(struct drm_plane *drm_plane,
        /* build the top field */
        top_field->gam_gdp_agc = GAM_GDP_AGC_FULL_RANGE;
        top_field->gam_gdp_ctl = WAIT_NEXT_VSYNC;
-       format = sti_gdp_fourcc2format(fb->pixel_format);
+       format = sti_gdp_fourcc2format(fb->format->format);
        top_field->gam_gdp_ctl |= format;
        top_field->gam_gdp_ctl |= sti_gdp_get_alpharange(format);
        top_field->gam_gdp_ppt &= ~GAM_GDP_PPT_IGNORE;
@@ -753,7 +753,7 @@ static void sti_gdp_atomic_update(struct drm_plane *drm_plane,
        cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
 
        DRM_DEBUG_DRIVER("drm FB:%d format:%.4s phys@:0x%lx\n", fb->base.id,
-                        (char *)&fb->pixel_format,
+                        (char *)&fb->format->format,
                         (unsigned long)cma_obj->paddr);
 
        /* pixel memory location */

diff --git a/drivers/gpu/drm/sti/sti_hqvdp.c b/drivers/gpu/drm/sti/sti_hqvdp.c
index f88130f2eb487e561ebc468258e8b524224b3667..becf10d255c49634dca6cb95fb6c188fc33d69f5 100644 (file)
--- a/drivers/gpu/drm/sti/sti_hqvdp.c
+++ b/drivers/gpu/drm/sti/sti_hqvdp.c
@@ -1147,7 +1147,7 @@ static void sti_hqvdp_atomic_update(struct drm_plane *drm_plane,
        cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
 
        DRM_DEBUG_DRIVER("drm FB:%d format:%.4s phys@:0x%lx\n", fb->base.id,
-                        (char *)&fb->pixel_format,
+                        (char *)&fb->format->format,
                         (unsigned long)cma_obj->paddr);
 
        /* Buffer planes address */

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c
index a606207d4e25639b3d9756a9772f69cecd039f19..a278e1f4466195fe5ccbc2141bbd8bcea309a652 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -189,7 +189,8 @@ int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,
        DRM_DEBUG_DRIVER("Switching display backend interlaced mode %s\n",
                         interlaced ? "on" : "off");
 
-       ret = sun4i_backend_drm_format_to_layer(plane, fb->pixel_format, &val);
+       ret = sun4i_backend_drm_format_to_layer(plane, fb->format->format,
+                                               &val);
        if (ret) {
                DRM_DEBUG_DRIVER("Invalid format\n");
                return val;

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 642dcff87e34e721bb267fe579ec8d30e42ae473..7561a95a54e383cb4df896f88a5b9903fe3347c6 100644 (file)
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -511,7 +511,7 @@ static int tegra_plane_atomic_check(struct drm_plane *plane,
        if (!state->crtc)
                return 0;
 
-       err = tegra_dc_format(state->fb->pixel_format, &plane_state->format,
+       err = tegra_dc_format(state->fb->format->format, &plane_state->format,
                              &plane_state->swap);
        if (err < 0)
                return err;

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 0dc96e12fd06dc17a9f6c992705a12a06c4df9c3..47c2fe659fe3073b30caf35ce1e17ecb1cf642b2 100644 (file)
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -399,7 +399,7 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc)
        if (info->tft_alt_mode)
                reg |= LCDC_TFT_ALT_ENABLE;
        if (priv->rev == 2) {
-               switch (fb->pixel_format) {
+               switch (fb->format->format) {
                case DRM_FORMAT_BGR565:
                case DRM_FORMAT_RGB565:
                        break;

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_plane.c b/drivers/gpu/drm/tilcdc/tilcdc_plane.c
index c0fc874e91cfe1a25a2d3b6cfa3bd1a38f5770cb..4b7519dfd1b9874ce44617aabe3f8f1a9f2835e1 100644 (file)
--- a/drivers/gpu/drm/tilcdc/tilcdc_plane.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_plane.c
@@ -77,7 +77,7 @@ static int tilcdc_plane_atomic_check(struct drm_plane *plane,
        }
 
        if (state->fb && old_state->fb &&
-           state->fb->pixel_format != old_state->fb->pixel_format) {
+           state->fb->format->format != old_state->fb->format->format) {
                dev_dbg(plane->dev->dev,
                        "%s(): pixel format change requires mode_change\n",
                        __func__);

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index f84f6bddd015ab632f8018493e1980376ed2821d..110d1518f5d52c7f01d7873c751422c02f7e83e0 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -295,7 +295,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
        struct drm_framebuffer *fb = state->fb;
        struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
        u32 subpixel_src_mask = (1 << 16) - 1;
-       u32 format = fb->pixel_format;
+       u32 format = fb->format->format;
        int num_planes = fb->format->num_planes;
        u32 h_subsample = 1;
        u32 v_subsample = 1;
@@ -496,7 +496,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
        struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
        struct drm_framebuffer *fb = state->fb;
        u32 ctl0_offset = vc4_state->dlist_count;
-       const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
+       const struct hvs_format *format = vc4_get_hvs_format(fb->format->format);
        int num_planes = drm_format_num_planes(format->drm);
        u32 scl0, scl1;
        u32 lbm_size;

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
index 58643c5ca1d7b3339d1a7a84ad43cad7b994fff7..867a8442220c23294ff2862578e2c3785e96ee94 100644 (file)
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -488,7 +488,7 @@ static int vmw_fb_kms_framebuffer(struct fb_info *info)
        cur_fb = par->set_fb;
        if (cur_fb && cur_fb->width == mode_cmd.width &&
            cur_fb->height == mode_cmd.height &&
-           cur_fb->pixel_format == mode_cmd.pixel_format &&
+           cur_fb->format->format == mode_cmd.pixel_format &&
            cur_fb->pitches[0] == mode_cmd.pitches[0])
                return 0;
 

diff --git a/drivers/gpu/drm/zte/zx_plane.c b/drivers/gpu/drm/zte/zx_plane.c
index 72d27b0a48b2e5c8811497f5bfb71410a10ebd85..b634b090cdc1bc7d79fbe7d6faf7885984658bfc 100644 (file)
--- a/drivers/gpu/drm/zte/zx_plane.c
+++ b/drivers/gpu/drm/zte/zx_plane.c
@@ -146,7 +146,7 @@ static void zx_gl_plane_atomic_update(struct drm_plane *plane,
        if (!fb)
                return;
 
-       format = fb->pixel_format;
+       format = fb->format->format;
        stride = fb->pitches[0];
 
        src_x = plane->state->src_x >> 16;

diff --git a/include/drm/drm_framebuffer.h b/include/drm/drm_framebuffer.h
index 72b9b4898915a0a7435b2e438bd94b1ac1826d51..f0dde1d02be49cacb9c2cf9c28b13ff17a2259be 100644 (file)
--- a/include/drm/drm_framebuffer.h
+++ b/include/drm/drm_framebuffer.h
@@ -174,10 +174,6 @@ struct drm_framebuffer {
         * DRM_MODE_FB_MODIFIERS.
         */
        int flags;
-       /**
-        * @pixel_format: DRM FOURCC code describing the pixel format.
-        */
-       uint32_t pixel_format; /* fourcc format */
        /**
         * @hot_x: X coordinate of the cursor hotspot. Used by the legacy cursor
         * IOCTL when the driver supports cursor through a DRM_PLANE_TYPE_CURSOR