int offset = irqd_to_hwirq(d);
        unsigned long flags;
        u8 gpiois, gpioibe, gpioiev;
+       u8 bit = BIT(offset);
 
        if (offset < 0 || offset >= PL061_GPIO_NR)
                return -EINVAL;
        spin_lock_irqsave(&chip->lock, flags);
 
        gpioiev = readb(chip->base + GPIOIEV);
-
        gpiois = readb(chip->base + GPIOIS);
+       gpioibe = readb(chip->base + GPIOIBE);
+
        if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
-               gpiois |= 1 << offset;
+               gpiois |= bit;
                if (trigger & IRQ_TYPE_LEVEL_HIGH)
-                       gpioiev |= 1 << offset;
+                       gpioiev |= bit;
                else
-                       gpioiev &= ~(1 << offset);
+                       gpioiev &= ~bit;
        } else
-               gpiois &= ~(1 << offset);
-       writeb(gpiois, chip->base + GPIOIS);
+               gpiois &= ~bit;
 
-       gpioibe = readb(chip->base + GPIOIBE);
        if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
-               gpioibe |= 1 << offset;
+               /* Setting this makes GPIOEV be ignored */
+               gpioibe |= bit;
        else {
-               gpioibe &= ~(1 << offset);
+               gpioibe &= ~bit;
                if (trigger & IRQ_TYPE_EDGE_RISING)
-                       gpioiev |= 1 << offset;
+                       gpioiev |= bit;
                else if (trigger & IRQ_TYPE_EDGE_FALLING)
-                       gpioiev &= ~(1 << offset);
+                       gpioiev &= ~bit;
        }
-       writeb(gpioibe, chip->base + GPIOIBE);
 
+       writeb(gpiois, chip->base + GPIOIS);
+       writeb(gpioibe, chip->base + GPIOIBE);
        writeb(gpioiev, chip->base + GPIOIEV);
 
        spin_unlock_irqrestore(&chip->lock, flags);