drm/amd/display: Add a check for idle power optimization

[why]
Need a helper function to check idle power is allowed
so that dc doesn't access any registers that are power-gated.

[how]
Implement helper function to check idle power optimization.
Enable a hook to check if detection is allowed.

Signed-off-by: Sung Joon Kim <Sungjoon.Kim@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index e5c4317842b5fc333212ef24eb609243ff3514d7..b3af7b1b034980021db48d776f2c545872840234 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -4803,7 +4803,8 @@ bool dc_set_psr_allow_active(struct dc *dc, bool enable)
 
 void dc_allow_idle_optimizations(struct dc *dc, bool allow)
 {
-       if (dc->debug.disable_idle_power_optimizations)
+       if (dc->debug.disable_idle_power_optimizations ||
+               (dc->caps.ips_support && dc->config.disable_ips))
                return;
 
        if (dc->clk_mgr != NULL && dc->clk_mgr->funcs->is_smu_present)
@@ -4817,6 +4818,23 @@ void dc_allow_idle_optimizations(struct dc *dc, bool allow)
                dc->idle_optimizations_allowed = allow;
 }
 
+bool dc_is_idle_power_optimized(struct dc *dc)
+{
+       uint32_t idle_state = 0;
+
+       if (dc->debug.disable_idle_power_optimizations)
+               return false;
+
+       if (dc->hwss.get_idle_state)
+               idle_state = dc->hwss.get_idle_state(dc);
+
+       if ((idle_state & DMUB_IPS1_ALLOW_MASK) ||
+               (idle_state & DMUB_IPS2_ALLOW_MASK))
+               return true;
+
+       return false;
+}
+
 /* set min and max memory clock to lowest and highest DPM level, respectively */
 void dc_unlock_memory_clock_frequency(struct dc *dc)
 {

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index aff097890782490d8d2ab6134a7dd4cc8d75abe0..a38e67e95208f2ed5a8580cae4deebb3324ace96 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -2311,6 +2311,7 @@ bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc, struct dc_plane_
                                struct dc_cursor_attributes *cursor_attr);
 
 void dc_allow_idle_optimizations(struct dc *dc, bool allow);
+bool dc_is_idle_power_optimized(struct dc *dc);
 
 /* set min and max memory clock to lowest and highest DPM level, respectively */
 void dc_unlock_memory_clock_frequency(struct dc *dc);

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
index b99db771e071499ecbd7cffa7e00c8fab87c6ce8..e43e8d4bfe375e93f9e75d285e57bb41cffc44de 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
@@ -352,6 +352,7 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
                        funcs->init_reg_offsets = dmub_srv_dcn35_regs_init;
 
                        funcs->is_hw_powered_up = dmub_dcn35_is_hw_powered_up;
+                       funcs->should_detect = dmub_dcn35_should_detect;
                        break;
 
        default: