drm/msm/a5xx: Separate A5XX_PC_DBG_ECO_CNTL write from main branch

The "main" if branch where we program the other registers for the
Adreno 5xx family of GPUs should not contain the PC_DBG_ECO_CNTL
register programming because this has logical similarity
differences from all the others.

A later commit will show the entire sense of this.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 81506d2539b0781d2633675274e73c8e0f13f36d..8c96fc0fc1b721e2f9ee027965831bd2df67b064 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -609,8 +609,6 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
                gpu_write(gpu, REG_A5XX_CP_MERCIU_SIZE, 0x20);
                gpu_write(gpu, REG_A5XX_CP_ROQ_THRESHOLDS_2, 0x40000030);
                gpu_write(gpu, REG_A5XX_CP_ROQ_THRESHOLDS_1, 0x20100D0A);
-               gpu_write(gpu, REG_A5XX_PC_DBG_ECO_CNTL,
-                         (0x200 << 11 | 0x200 << 22));
        } else {
                gpu_write(gpu, REG_A5XX_CP_MEQ_THRESHOLDS, 0x40);
                if (adreno_is_a530(adreno_gpu))
@@ -619,9 +617,14 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
                        gpu_write(gpu, REG_A5XX_CP_MERCIU_SIZE, 0x400);
                gpu_write(gpu, REG_A5XX_CP_ROQ_THRESHOLDS_2, 0x80000060);
                gpu_write(gpu, REG_A5XX_CP_ROQ_THRESHOLDS_1, 0x40201B16);
+       }
+
+       if (adreno_is_a510(adreno_gpu))
+               gpu_write(gpu, REG_A5XX_PC_DBG_ECO_CNTL,
+                         (0x200 << 11 | 0x200 << 22));
+       else
                gpu_write(gpu, REG_A5XX_PC_DBG_ECO_CNTL,
                          (0x400 << 11 | 0x300 << 22));
-       }
 
        if (adreno_gpu->info->quirks & ADRENO_QUIRK_TWO_PASS_USE_WFI)
                gpu_rmw(gpu, REG_A5XX_PC_DBG_ECO_CNTL, 0, (1 << 8));