}
 
                /* Clear status & disable interrupts */
-               pxa2xx_spi_write(drv_data, SSCR1,
-                                pxa2xx_spi_read(drv_data, SSCR1)
-                                & ~drv_data->dma_cr1);
+               clear_SSCR1_bits(drv_data, drv_data->dma_cr1);
                write_SSSR_CS(drv_data, drv_data->clear_sr);
                if (!pxa25x_ssp_comp(drv_data))
                        pxa2xx_spi_write(drv_data, SSTO, 0);
 
 static void handle_bad_msg(struct driver_data *drv_data)
 {
        pxa2xx_spi_off(drv_data);
-       pxa2xx_spi_write(drv_data, SSCR1,
-                        pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1);
+       clear_SSCR1_bits(drv_data, drv_data->int_cr1);
        if (!pxa25x_ssp_comp(drv_data))
                pxa2xx_spi_write(drv_data, SSTO, 0);
        write_SSSR_CS(drv_data, drv_data->clear_sr);
        pxa2xx_spi_off(drv_data);
        /* Clear and disable interrupts and service requests */
        write_SSSR_CS(drv_data, drv_data->clear_sr);
-       pxa2xx_spi_write(drv_data, SSCR1,
-                        pxa2xx_spi_read(drv_data, SSCR1)
-                        & ~(drv_data->int_cr1 | drv_data->dma_cr1));
+       clear_SSCR1_bits(drv_data, drv_data->int_cr1 | drv_data->dma_cr1);
        if (!pxa25x_ssp_comp(drv_data))
                pxa2xx_spi_write(drv_data, SSTO, 0);
 
 
        }
 }
 
+static inline void clear_SSCR1_bits(const struct driver_data *drv_data, u32 bits)
+{
+       pxa2xx_spi_write(drv_data, SSCR1, pxa2xx_spi_read(drv_data, SSCR1) & ~bits);
+}
+
 static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val)
 {
        if (drv_data->ssp_type == CE4100_SSP ||