drm/amdgpu: expose BACO interfaces to upper level from PP

Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 9bc27f468d5be578fe4f014d1439698703eb4972..5d8b5d3c24535e9abeb318c947aee869ccd30e2d 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1404,6 +1404,57 @@ static int pp_set_active_display_count(void *handle, uint32_t count)
        return ret;
 }
 
+static int pp_get_asic_baco_capability(void *handle, bool *cap)
+{
+       struct pp_hwmgr *hwmgr = handle;
+
+       if (!hwmgr)
+               return -EINVAL;
+
+       if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_capability)
+               return 0;
+
+       mutex_lock(&hwmgr->smu_lock);
+       hwmgr->hwmgr_func->get_asic_baco_capability(hwmgr, cap);
+       mutex_unlock(&hwmgr->smu_lock);
+
+       return 0;
+}
+
+static int pp_get_asic_baco_state(void *handle, int *state)
+{
+       struct pp_hwmgr *hwmgr = handle;
+
+       if (!hwmgr)
+               return -EINVAL;
+
+       if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_state)
+               return 0;
+
+       mutex_lock(&hwmgr->smu_lock);
+       hwmgr->hwmgr_func->get_asic_baco_state(hwmgr, (enum BACO_STATE *)state);
+       mutex_unlock(&hwmgr->smu_lock);
+
+       return 0;
+}
+
+static int pp_set_asic_baco_state(void *handle, int state)
+{
+       struct pp_hwmgr *hwmgr = handle;
+
+       if (!hwmgr)
+               return -EINVAL;
+
+       if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_asic_baco_state)
+               return 0;
+
+       mutex_lock(&hwmgr->smu_lock);
+       hwmgr->hwmgr_func->set_asic_baco_state(hwmgr, (enum BACO_STATE)state);
+       mutex_unlock(&hwmgr->smu_lock);
+
+       return 0;
+}
+
 static const struct amd_pm_funcs pp_dpm_funcs = {
        .load_firmware = pp_dpm_load_fw,
        .wait_for_fw_loading_complete = pp_dpm_fw_loading_complete,
@@ -1454,4 +1505,7 @@ static const struct amd_pm_funcs pp_dpm_funcs = {
        .set_min_deep_sleep_dcefclk = pp_set_min_deep_sleep_dcefclk,
        .set_hard_min_dcefclk_by_freq = pp_set_hard_min_dcefclk_by_freq,
        .set_hard_min_fclk_by_freq = pp_set_hard_min_fclk_by_freq,
+       .get_asic_baco_capability = pp_get_asic_baco_capability,
+       .get_asic_baco_state = pp_get_asic_baco_state,
+       .set_asic_baco_state = pp_set_asic_baco_state,
 };

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 91e3bbe6d61df0401792d36612fe55b4e0312426..d1e26284461965b13c4487e0fd98a286c1b7cde1 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -48,6 +48,7 @@
 #include "ppinterrupt.h"
 #include "pp_overdriver.h"
 #include "pp_thermal.h"
+#include "vega10_baco.h"
 
 #include "smuio/smuio_9_0_offset.h"
 #include "smuio/smuio_9_0_sh_mask.h"
@@ -4980,6 +4981,9 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
        .set_power_limit = vega10_set_power_limit,
        .odn_edit_dpm_table = vega10_odn_edit_dpm_table,
        .get_performance_level = vega10_get_performance_level,
+       .get_asic_baco_capability = vega10_baco_get_capability,
+       .get_asic_baco_state = vega10_baco_get_state,
+       .set_asic_baco_state = vega10_baco_set_state,
 };
 
 int vega10_hwmgr_init(struct pp_hwmgr *hwmgr)