priv->have_complementary_output = (ccer != 0);
 }
 
-static int stm32_pwm_detect_channels(struct stm32_pwm *priv)
+static unsigned int stm32_pwm_detect_channels(struct stm32_pwm *priv)
 {
        u32 ccer;
-       int npwm = 0;
 
        /*
         * If channels enable bits don't exist writing 1 will have no
        regmap_read(priv->regmap, TIM_CCER, &ccer);
        regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
 
-       if (ccer & TIM_CCER_CC1E)
-               npwm++;
-
-       if (ccer & TIM_CCER_CC2E)
-               npwm++;
-
-       if (ccer & TIM_CCER_CC3E)
-               npwm++;
-
-       if (ccer & TIM_CCER_CC4E)
-               npwm++;
-
-       return npwm;
+       return hweight32(ccer & TIM_CCER_CCXE);
 }
 
 static int stm32_pwm_probe(struct platform_device *pdev)