clk: rp1: convert from round_rate() to determine_rate()

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/linux-clk/20250828-clk-round-rate-v2-v1-0-b97ec8ba6cc4@redhat.com/T/#mbb878a331cf0f8930257a356c1d9e2ab458e3efb
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

diff --git a/drivers/clk/clk-rp1.c b/drivers/clk/clk-rp1.c
index e8f264d7f34e42f7186dbba31e5ace95d67b9a7d..fd144755b879862612ea5e22e913dbb44a140033 100644 (file)
--- a/drivers/clk/clk-rp1.c
+++ b/drivers/clk/clk-rp1.c
@@ -532,13 +532,16 @@ static unsigned long rp1_pll_core_recalc_rate(struct clk_hw *hw,
        return calc_rate;
 }
 
-static long rp1_pll_core_round_rate(struct clk_hw *hw, unsigned long rate,
-                                   unsigned long *parent_rate)
+static int rp1_pll_core_determine_rate(struct clk_hw *hw,
+                                      struct clk_rate_request *req)
 {
        u32 fbdiv_int, fbdiv_frac;
 
-       return get_pll_core_divider(hw, rate, *parent_rate,
-                                   &fbdiv_int, &fbdiv_frac);
+       req->rate = get_pll_core_divider(hw, req->rate, req->best_parent_rate,
+                                        &fbdiv_int,
+                                        &fbdiv_frac);
+
+       return 0;
 }
 
 static void get_pll_prim_dividers(unsigned long rate, unsigned long parent_rate,
@@ -616,18 +619,20 @@ static unsigned long rp1_pll_recalc_rate(struct clk_hw *hw,
        return DIV_ROUND_CLOSEST(parent_rate, prim_div1 * prim_div2);
 }
 
-static long rp1_pll_round_rate(struct clk_hw *hw, unsigned long rate,
-                              unsigned long *parent_rate)
+static int rp1_pll_determine_rate(struct clk_hw *hw,
+                                 struct clk_rate_request *req)
 {
        struct clk_hw *clk_audio_hw = &clk_audio->hw;
        u32 div1, div2;
 
-       if (hw == clk_audio_hw && clk_audio->cached_rate == rate)
-               *parent_rate = clk_audio_core->cached_rate;
+       if (hw == clk_audio_hw && clk_audio->cached_rate == req->rate)
+               req->best_parent_rate = clk_audio_core->cached_rate;
+
+       get_pll_prim_dividers(req->rate, req->best_parent_rate, &div1, &div2);
 
-       get_pll_prim_dividers(rate, *parent_rate, &div1, &div2);
+       req->rate = DIV_ROUND_CLOSEST(req->best_parent_rate, div1 * div2);
 
-       return DIV_ROUND_CLOSEST(*parent_rate, div1 * div2);
+       return 0;
 }
 
 static int rp1_pll_ph_is_on(struct clk_hw *hw)
@@ -677,13 +682,15 @@ static unsigned long rp1_pll_ph_recalc_rate(struct clk_hw *hw,
        return parent_rate / data->fixed_divider;
 }
 
-static long rp1_pll_ph_round_rate(struct clk_hw *hw, unsigned long rate,
-                                 unsigned long *parent_rate)
+static int rp1_pll_ph_determine_rate(struct clk_hw *hw,
+                                    struct clk_rate_request *req)
 {
        struct rp1_clk_desc *pll_ph = container_of(hw, struct rp1_clk_desc, hw);
        const struct rp1_pll_ph_data *data = pll_ph->data;
 
-       return *parent_rate / data->fixed_divider;
+       req->rate = req->best_parent_rate / data->fixed_divider;
+
+       return 0;
 }
 
 static int rp1_pll_divider_is_on(struct clk_hw *hw)
@@ -760,11 +767,12 @@ static unsigned long rp1_pll_divider_recalc_rate(struct clk_hw *hw,
        return clk_divider_ops.recalc_rate(hw, parent_rate);
 }
 
-static long rp1_pll_divider_round_rate(struct clk_hw *hw,
-                                      unsigned long rate,
-                                      unsigned long *parent_rate)
+static int rp1_pll_divider_determine_rate(struct clk_hw *hw,
+                                         struct clk_rate_request *req)
 {
-       return clk_divider_ops.round_rate(hw, rate, parent_rate);
+       req->rate = clk_divider_ops.determine_rate(hw, req);
+
+       return 0;
 }
 
 static int rp1_clock_is_on(struct clk_hw *hw)
@@ -1166,10 +1174,10 @@ static unsigned long rp1_varsrc_recalc_rate(struct clk_hw *hw,
        return clock->cached_rate;
 }
 
-static long rp1_varsrc_round_rate(struct clk_hw *hw, unsigned long rate,
-                                 unsigned long *parent_rate)
+static int rp1_varsrc_determine_rate(struct clk_hw *hw,
+                                    struct clk_rate_request *req)
 {
-       return rate;
+       return 0;
 }
 
 static const struct clk_ops rp1_pll_core_ops = {
@@ -1178,13 +1186,13 @@ static const struct clk_ops rp1_pll_core_ops = {
        .unprepare = rp1_pll_core_off,
        .set_rate = rp1_pll_core_set_rate,
        .recalc_rate = rp1_pll_core_recalc_rate,
-       .round_rate = rp1_pll_core_round_rate,
+       .determine_rate = rp1_pll_core_determine_rate,
 };
 
 static const struct clk_ops rp1_pll_ops = {
        .set_rate = rp1_pll_set_rate,
        .recalc_rate = rp1_pll_recalc_rate,
-       .round_rate = rp1_pll_round_rate,
+       .determine_rate = rp1_pll_determine_rate,
 };
 
 static const struct clk_ops rp1_pll_ph_ops = {
@@ -1192,7 +1200,7 @@ static const struct clk_ops rp1_pll_ph_ops = {
        .prepare = rp1_pll_ph_on,
        .unprepare = rp1_pll_ph_off,
        .recalc_rate = rp1_pll_ph_recalc_rate,
-       .round_rate = rp1_pll_ph_round_rate,
+       .determine_rate = rp1_pll_ph_determine_rate,
 };
 
 static const struct clk_ops rp1_pll_divider_ops = {
@@ -1201,7 +1209,7 @@ static const struct clk_ops rp1_pll_divider_ops = {
        .unprepare = rp1_pll_divider_off,
        .set_rate = rp1_pll_divider_set_rate,
        .recalc_rate = rp1_pll_divider_recalc_rate,
-       .round_rate = rp1_pll_divider_round_rate,
+       .determine_rate = rp1_pll_divider_determine_rate,
 };
 
 static const struct clk_ops rp1_clk_ops = {
@@ -1219,7 +1227,7 @@ static const struct clk_ops rp1_clk_ops = {
 static const struct clk_ops rp1_varsrc_ops = {
        .set_rate = rp1_varsrc_set_rate,
        .recalc_rate = rp1_varsrc_recalc_rate,
-       .round_rate = rp1_varsrc_round_rate,
+       .determine_rate = rp1_varsrc_determine_rate,
 };
 
 static struct clk_hw *rp1_register_pll(struct rp1_clockman *clockman,