P1/P2/P3 transition sequence.
  - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
                        amount of 8B10B errors occur.
+ - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
+                       from P0 to P1/P2/P3.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
 
        if (dwc->del_p1p2p3_quirk)
                reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN;
 
+       if (dwc->del_phy_power_chg_quirk)
+               reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE;
+
        dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
        mdelay(100);
                                "snps,req_p1p2p3_quirk");
                dwc->del_p1p2p3_quirk = of_property_read_bool(node,
                                "snps,del_p1p2p3_quirk");
+               dwc->del_phy_power_chg_quirk = of_property_read_bool(node,
+                               "snps,del_phy_power_chg_quirk");
        } else if (pdata) {
                dwc->maximum_speed = pdata->maximum_speed;
                dwc->has_lpm_erratum = pdata->has_lpm_erratum;
                dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk;
                dwc->req_p1p2p3_quirk = pdata->req_p1p2p3_quirk;
                dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
+               dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
        }
 
        /* default to superspeed if no maximum_speed passed */
 
 #define DWC3_GUSB3PIPECTL_DEP1P2P3(n)  ((n) << 19)
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK        DWC3_GUSB3PIPECTL_DEP1P2P3(7)
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_EN  DWC3_GUSB3PIPECTL_DEP1P2P3(1)
+#define DWC3_GUSB3PIPECTL_DEPOCHANGE   (1 << 18)
 #define DWC3_GUSB3PIPECTL_SUSPHY       (1 << 17)
 
 /* Global TX Fifo Size Register */
  * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
  * @req_p1p2p3_quirk: set if we enable request p1p2p3 quirk
  * @del_p1p2p3_quirk: set if we enable delay p1p2p3 quirk
+ * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
  */
 struct dwc3 {
        struct usb_ctrlrequest  *ctrl_req;
        unsigned                u2ss_inp3_quirk:1;
        unsigned                req_p1p2p3_quirk:1;
        unsigned                del_p1p2p3_quirk:1;
+       unsigned                del_phy_power_chg_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
 
        unsigned u2ss_inp3_quirk:1;
        unsigned req_p1p2p3_quirk:1;
        unsigned del_p1p2p3_quirk:1;
+       unsigned del_phy_power_chg_quirk:1;
 };