arm64: dts: qcom: sa8775p: add high-speed UART nodes

Add two UART nodes that are known to be used by existing development
boards with this SoC.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230309103752.173541-8-brgl@bgdev.pl

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 0be5a469c8eacf62746a2614e9c80ac7cf661eee..c5b73c591e0fd432467536d7ff7be92797e75d43 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -498,6 +498,21 @@
                                operating-points-v2 = <&qup_opp_table_100mhz>;
                                status = "disabled";
                        };
+
+                       uart12: serial@a94000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0x0 0x00a94000 0x0 0x4000>;
+                               interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
+                               clock-names = "se";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
+                                                &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>;
+                               interconnect-names = "qup-core", "qup-config";
+                               power-domains = <&rpmhpd SA8775P_CX>;
+                               status = "disabled";
+                       };
                };
 
                qupv3_id_2: geniqup@8c0000 {
@@ -533,6 +548,21 @@
                                status = "disabled";
                        };
 
+                       uart17: serial@88c000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0x0 0x0088c000 0x0 0x4000>;
+                               interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
+                               clock-names = "se";
+                               interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
+                                                &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>;
+                               interconnect-names = "qup-core", "qup-config";
+                               power-domains = <&rpmhpd SA8775P_CX>;
+                               status = "disabled";
+                       };
+
                        i2c18: i2c@890000 {
                                compatible = "qcom,geni-i2c";
                                reg = <0x0 0x00890000 0x0 0x4000>;