arm64: dts: imx95-19x19-evk: add PCIe[0,1] support

Add PCIe[0,1] and all dependent nodes.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 750a5255b57ce19a19bff95c3a4df38ebdb9baca..d14a54ab4fd47362510e2ba644606bcc4174615f 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -40,6 +40,34 @@
                };
        };
 
+       reg_m2_pwr: regulator-m2-pwr {
+               compatible = "regulator-fixed";
+               regulator-name = "M.2-power";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&i2c7_pcal6524 20 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       reg_pcie0: regulator-pcie {
+               compatible = "regulator-fixed";
+               regulator-name = "PCIE_WLAN_EN";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&reg_m2_pwr>;
+               gpio = <&i2c7_pcal6524 6 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       reg_slot_pwr: regulator-slot-pwr {
+               compatible = "regulator-fixed";
+               regulator-name = "PCIe slot-power";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&i2c7_pcal6524 14 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        reg_usdhc2_vmmc: regulator-usdhc2 {
                compatible = "regulator-fixed";
                pinctrl-names = "default";
@@ -84,6 +112,22 @@
        status = "okay";
 };
 
+&pcie0 {
+       pinctrl-0 = <&pinctrl_pcie0>;
+       pinctrl-names = "default";
+       reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>;
+       vpcie-supply = <&reg_pcie0>;
+       status = "okay";
+};
+
+&pcie1 {
+       pinctrl-0 = <&pinctrl_pcie1>;
+       pinctrl-names = "default";
+       reset-gpio = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>;
+       vpcie-supply = <&reg_slot_pwr>;
+       status = "okay";
+};
+
 &usdhc1 {
        pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
        pinctrl-0 = <&pinctrl_usdhc1>;
@@ -128,6 +172,18 @@
                >;
        };
 
+       pinctrl_pcie0: pcie0grp {
+               fsl,pins = <
+                       IMX95_PAD_GPIO_IO32__HSIOMIX_TOP_PCIE1_CLKREQ_B         0x4000031e
+               >;
+       };
+
+       pinctrl_pcie1: pcie1grp {
+               fsl,pins = <
+                       IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B         0x4000031e
+               >;
+       };
+
        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX      0x31e