net: phy: mediatek: Add token ring set bit operation support

Previously in mtk-ge-soc.c, we set some register bits via token
ring, which were implemented in three __phy_write().
Now we can do the same thing via __mtk_tr_set_bits() helper.

Signed-off-by: Sky Huang <skylake.huang@mediatek.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250213080553.921434-4-SkyLake.Huang@mediatek.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/phy/mediatek/mtk-ge-soc.c b/drivers/net/phy/mediatek/mtk-ge-soc.c
index 5d737379365953eeaee666951a22f271646dddd6..37777ad104d87ad2db547dcd3e2ffb6339cf924d 100644 (file)
--- a/drivers/net/phy/mediatek/mtk-ge-soc.c
+++ b/drivers/net/phy/mediatek/mtk-ge-soc.c
@@ -62,6 +62,10 @@
 /* MasDSPreadyTime */
 #define MASTER_DSP_READY_TIME_MASK             GENMASK(14, 7)
 
+/* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x18 */
+/* EnabRandUpdTrig */
+#define ENABLE_RANDOM_UPDOWN_COUNTER_TRIGGER   BIT(8)
+
 /* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x20 */
 /* ResetSyncOffset */
 #define RESET_SYNC_OFFSET_MASK                 GENMASK(11, 8)
@@ -789,10 +793,8 @@ static void mt798x_phy_common_finetune(struct phy_device *phydev)
                        FIELD_PREP(SLAVE_DSP_READY_TIME_MASK, 0x18) |
                        FIELD_PREP(MASTER_DSP_READY_TIME_MASK, 0x18));
 
-       /* EnabRandUpdTrig = 1 */
-       __phy_write(phydev, 0x11, 0x2f00);
-       __phy_write(phydev, 0x12, 0xe);
-       __phy_write(phydev, 0x10, 0x8fb0);
+       __mtk_tr_set_bits(phydev, 0x1, 0xf, 0x18,
+                         ENABLE_RANDOM_UPDOWN_COUNTER_TRIGGER);
 
        __mtk_tr_modify(phydev, 0x0, 0x7, 0x15,
                        NORMAL_MSE_LO_THRESH_MASK,

diff --git a/drivers/net/phy/mediatek/mtk-phy-lib.c b/drivers/net/phy/mediatek/mtk-phy-lib.c
index 7275e4ee22981d4773b9355a0e752ef4914f742f..df8fdadcc0f45357e359eac4b2c2f2712fc1a28c 100644 (file)
--- a/drivers/net/phy/mediatek/mtk-phy-lib.c
+++ b/drivers/net/phy/mediatek/mtk-phy-lib.c
@@ -69,6 +69,13 @@ void mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
 }
 EXPORT_SYMBOL_GPL(mtk_tr_modify);
 
+void __mtk_tr_set_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
+                      u8 data_addr, u32 set)
+{
+       __mtk_tr_modify(phydev, ch_addr, node_addr, data_addr, 0, set);
+}
+EXPORT_SYMBOL_GPL(__mtk_tr_set_bits);
+
 int mtk_phy_read_page(struct phy_device *phydev)
 {
        return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);

diff --git a/drivers/net/phy/mediatek/mtk.h b/drivers/net/phy/mediatek/mtk.h
index af44d1ad8c9ed11ec0b651d8a838e26f45282a3e..2d8e5b934a024f6d8466b4c82a8eb7b5132ba5bb 100644 (file)
--- a/drivers/net/phy/mediatek/mtk.h
+++ b/drivers/net/phy/mediatek/mtk.h
@@ -72,6 +72,8 @@ void __mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
                     u8 data_addr, u32 mask, u32 set);
 void mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
                   u8 data_addr, u32 mask, u32 set);
+void __mtk_tr_set_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr,
+                      u8 data_addr, u32 set);
 
 int mtk_phy_read_page(struct phy_device *phydev);
 int mtk_phy_write_page(struct phy_device *phydev, int page);