drm/amdgpu/display: properly guard the calls to swSMU functions

It's only applicable on newer asics.  We could end up here when
using DC on older asics like SI or KV.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 35a317b70719b7aac85a2ddf615eb20b85b2692d..c5f2216e59c478d8dbf57c626cb36a86a104146f 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -106,7 +106,7 @@ bool dm_pp_apply_display_requirements(
                        adev->powerplay.pp_funcs->display_configuration_change(
                                adev->powerplay.pp_handle,
                                &adev->pm.pm_display_cfg);
-               else
+               else if (adev->smu.ppt_funcs)
                        smu_display_configuration_change(smu,
                                                         &adev->pm.pm_display_cfg);
 
@@ -592,7 +592,7 @@ void pp_rv_set_wm_ranges(struct pp_smu *pp,
        if (pp_funcs && pp_funcs->set_watermarks_for_clocks_ranges)
                pp_funcs->set_watermarks_for_clocks_ranges(pp_handle,
                                                           &wm_with_clock_ranges);
-       else
+       else if (adev->smu.ppt_funcs)
                smu_set_watermarks_for_clock_ranges(&adev->smu,
                                &wm_with_clock_ranges);
 }