]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
irqchip/armada-370-xp: Iterate only valid bits of the per-CPU interrupt cause register
authorMarek BehĂșn <kabel@kernel.org>
Wed, 7 Aug 2024 16:41:02 +0000 (18:41 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Thu, 8 Aug 2024 15:15:01 +0000 (17:15 +0200)
Use MPIC_PER_CPU_IRQS_NR (29) bound instead of BITS_PER_LONG (32) when
iterating the bits of the per-CPU interrupt cause register, since there
are only 29 per-CPU interrupts. The top 3 bits are always zero anyway.

Signed-off-by: Marek BehĂșn <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
drivers/irqchip/irq-armada-370-xp.c

index 83afc3a278125def295937f84b2fc464a57d69d2..36d1bac8a99fdf5ee68a692d19f3f896bac117c5 100644 (file)
@@ -678,7 +678,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc)
        cause = readl_relaxed(mpic->per_cpu + MPIC_PPI_CAUSE);
        cpuid = cpu_logical_map(smp_processor_id());
 
-       for_each_set_bit(i, &cause, BITS_PER_LONG) {
+       for_each_set_bit(i, &cause, MPIC_PER_CPU_IRQS_NR) {
                irqsrc = readl_relaxed(mpic->base + MPIC_INT_SOURCE_CTL(i));
 
                /* Check if the interrupt is not masked on current CPU.