arm64: dts: rockchip: Add common DT for edgeble-neu6b-io

Edgeble Neu6a and Neu6b are compatible with common IO board.

So, maintain the IO board in rk3588-edgeble-neu6a-io.dtsi.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-4-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts
index be6a4f4f90f68bb98decaf12070e5f8a9670b500..46d5e21d4d27a338c743f70b15f8d39e7a21dcfb 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts
@@ -6,18 +6,10 @@
 /dts-v1/;
 #include "rk3588.dtsi"
 #include "rk3588-edgeble-neu6a.dtsi"
+#include "rk3588-edgeble-neu6a-io.dtsi"
 
 / {
        model = "Edgeble Neu6A IO Board";
        compatible = "edgeble,neural-compute-module-6a-io",
                     "edgeble,neural-compute-module-6a", "rockchip,rk3588";
-
-       chosen {
-               stdout-path = "serial2:1500000n8";
-       };
-};
-
-&uart2 {
-       pinctrl-0 = <&uart2m0_xfer>;
-       status = "okay";
 };

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi
new file mode 100644 (file)
index 0000000..fb32847
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+/ {
+       chosen {
+               stdout-path = "serial2:1500000n8";
+       };
+};
+
+&combphy0_ps {
+       status = "okay";
+};
+
+&i2c6 {
+       status = "okay";
+
+       hym8563: rtc@51 {
+               compatible = "haoyu,hym8563";
+               reg = <0x51>;
+               interrupt-parent = <&gpio0>;
+               interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+               #clock-cells = <0>;
+               clock-output-names = "hym8563";
+               pinctrl-names = "default";
+               pinctrl-0 = <&hym8563_int>;
+               wakeup-source;
+       };
+};
+
+&pinctrl {
+       hym8563 {
+               hym8563_int: hym8563-int {
+                       rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+};
+
+/* FAN */
+&pwm2 {
+       pinctrl-0 = <&pwm2m1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&sata0 {
+       status = "okay";
+};
+
+&sdmmc {
+       bus-width = <4>;
+       cap-mmc-highspeed;
+       cap-sd-highspeed;
+       disable-wp;
+       no-sdio;
+       no-mmc;
+       sd-uhs-sdr104;
+       vmmc-supply = <&vcc_3v3_s3>;
+       vqmmc-supply = <&vccio_sd_s0>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-0 = <&uart2m0_xfer>;
+       status = "okay";
+};
+
+/* RS232 */
+&uart6 {
+       pinctrl-0 = <&uart6m0_xfer>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+/* RS485 */
+&uart7 {
+       pinctrl-0 = <&uart7m2_xfer>;
+       pinctrl-names = "default";
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
index 070baeb63431f960345f5622e1a1ee3a3df1b1ca..0d6f1be69ac88458feb1509c030d936c4a0d04fe 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
@@ -6,84 +6,10 @@
 /dts-v1/;
 #include "rk3588j.dtsi"
 #include "rk3588-edgeble-neu6b.dtsi"
+#include "rk3588-edgeble-neu6a-io.dtsi"
 
 / {
        model = "Edgeble Neu6B IO Board";
        compatible = "edgeble,neural-compute-module-6a-io",
                     "edgeble,neural-compute-module-6b", "rockchip,rk3588";
-
-       chosen {
-               stdout-path = "serial2:1500000n8";
-       };
-};
-
-&combphy0_ps {
-       status = "okay";
-};
-
-&i2c6 {
-       status = "okay";
-
-       hym8563: rtc@51 {
-               compatible = "haoyu,hym8563";
-               reg = <0x51>;
-               interrupt-parent = <&gpio0>;
-               interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
-               #clock-cells = <0>;
-               clock-output-names = "hym8563";
-               pinctrl-names = "default";
-               pinctrl-0 = <&hym8563_int>;
-               wakeup-source;
-       };
-};
-
-&pinctrl {
-       hym8563 {
-               hym8563_int: hym8563-int {
-                       rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
-               };
-       };
-};
-
-/* FAN */
-&pwm2 {
-       pinctrl-0 = <&pwm2m1_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-};
-
-&sata0 {
-       status = "okay";
-};
-
-&sdmmc {
-       bus-width = <4>;
-       cap-mmc-highspeed;
-       cap-sd-highspeed;
-       disable-wp;
-       no-sdio;
-       no-mmc;
-       sd-uhs-sdr104;
-       vmmc-supply = <&vcc_3v3_s3>;
-       vqmmc-supply = <&vccio_sd_s0>;
-       status = "okay";
-};
-
-&uart2 {
-       pinctrl-0 = <&uart2m0_xfer>;
-       status = "okay";
-};
-
-/* RS232 */
-&uart6 {
-       pinctrl-0 = <&uart6m0_xfer>;
-       pinctrl-names = "default";
-       status = "okay";
-};
-
-/* RS485 */
-&uart7 {
-       pinctrl-0 = <&uart7m2_xfer>;
-       pinctrl-names = "default";
-       status = "okay";
 };