]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
powerpc: Remove CONFIG_PPC_FSL_BOOK3E
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Mon, 19 Sep 2022 17:01:38 +0000 (19:01 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 26 Sep 2022 13:00:13 +0000 (23:00 +1000)
CONFIG_PPC_FSL_BOOK3E is redundant with CONFIG_PPC_E500.

Remove it.

And rename five files accordingly.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
[mpe: Rename include guards to match new file names]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/795cb93b88c9a0279289712e674f39e3b108a1b4.1663606876.git.christophe.leroy@csgroup.eu
32 files changed:
arch/powerpc/Kconfig
arch/powerpc/include/asm/barrier.h
arch/powerpc/include/asm/hugetlb.h
arch/powerpc/include/asm/kvm_host.h
arch/powerpc/include/asm/mmu.h
arch/powerpc/include/asm/nohash/32/pgtable.h
arch/powerpc/include/asm/nohash/64/pgtable.h
arch/powerpc/include/asm/nohash/hugetlb-e500.h [moved from arch/powerpc/include/asm/nohash/hugetlb-book3e.h with 84% similarity]
arch/powerpc/include/asm/nohash/pgtable.h
arch/powerpc/include/asm/nohash/pte-e500.h [moved from arch/powerpc/include/asm/nohash/pte-book3e.h with 96% similarity]
arch/powerpc/include/asm/page.h
arch/powerpc/include/asm/ppc_asm.h
arch/powerpc/include/asm/setup.h
arch/powerpc/kernel/Makefile
arch/powerpc/kernel/asm-offsets.c
arch/powerpc/kernel/cpu_setup_e500.S [moved from arch/powerpc/kernel/cpu_setup_fsl_booke.S with 100% similarity]
arch/powerpc/kernel/head_booke.h
arch/powerpc/kernel/interrupt_64.S
arch/powerpc/kernel/security.c
arch/powerpc/kernel/smp.c
arch/powerpc/kernel/sysfs.c
arch/powerpc/kernel/vmlinux.lds.S
arch/powerpc/lib/feature-fixups.c
arch/powerpc/mm/hugetlbpage.c
arch/powerpc/mm/mem.c
arch/powerpc/mm/mmu_decl.h
arch/powerpc/mm/nohash/Makefile
arch/powerpc/mm/nohash/e500.c [moved from arch/powerpc/mm/nohash/fsl_book3e.c with 100% similarity]
arch/powerpc/mm/nohash/e500_hugetlbpage.c [moved from arch/powerpc/mm/nohash/book3e_hugetlbpage.c with 100% similarity]
arch/powerpc/mm/nohash/tlb.c
arch/powerpc/mm/nohash/tlb_low.S
arch/powerpc/platforms/Kconfig.cputype

index 9d721cac20b80609ddc7eec0f28ac4e3ff639fd3..a7b58645cc3f1401806107df643a10899e87758f 100644 (file)
@@ -290,7 +290,7 @@ config PPC_LONG_DOUBLE_128
 config PPC_BARRIER_NOSPEC
        bool
        default y
-       depends on PPC_BOOK3S_64 || PPC_FSL_BOOK3E
+       depends on PPC_BOOK3S_64 || PPC_E500
 
 config EARLY_PRINTK
        bool
index ef2d8b15eaabe3d876174588886d76851c6d6142..e80b2c0e9315a1fc2515d207c7cadcba5f425ca8 100644 (file)
@@ -86,7 +86,7 @@ do {                                                                  \
 
 #ifdef CONFIG_PPC_BOOK3S_64
 #define NOSPEC_BARRIER_SLOT   nop
-#elif defined(CONFIG_PPC_FSL_BOOK3E)
+#elif defined(CONFIG_PPC_E500)
 #define NOSPEC_BARRIER_SLOT   nop; nop
 #endif
 
index 32ce0fb7548f83712fe4a6b7fcc7be5e06c51f67..ea71f7245a63e5b4ae522b7767a3b01845a86e36 100644 (file)
@@ -7,8 +7,8 @@
 
 #ifdef CONFIG_PPC_BOOK3S_64
 #include <asm/book3s/64/hugetlb.h>
-#elif defined(CONFIG_PPC_FSL_BOOK3E)
-#include <asm/nohash/hugetlb-book3e.h>
+#elif defined(CONFIG_PPC_E500)
+#include <asm/nohash/hugetlb-e500.h>
 #elif defined(CONFIG_PPC_8xx)
 #include <asm/nohash/32/hugetlb-8xx.h>
 #endif /* CONFIG_PPC_BOOK3S_64 */
index c2b003550dc9845e1645bc0e93de80622da9284a..caea15dcb91dd0d192100615315fd863f22b3b03 100644 (file)
@@ -443,7 +443,7 @@ struct kvmppc_passthru_irqmap {
 };
 #endif
 
-# ifdef CONFIG_PPC_FSL_BOOK3E
+# ifdef CONFIG_PPC_E500
 #define KVMPPC_BOOKE_IAC_NUM   2
 #define KVMPPC_BOOKE_DAC_NUM   2
 # else
index 5b46da9ba7f699eb5a22762f4d07c571f3aabc0f..39057320e4363f6e535dde1b50d3b159cb0d3f00 100644 (file)
 
 typedef pte_t *pgtable_t;
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 #include <asm/percpu.h>
 DECLARE_PER_CPU(int, next_tlbcam_idx);
 #endif
index 197e7552d9f611710e7e132cf3994a3fa31ba5ef..0d40b33184ebe9a7c1f3372c3dbaaa78aa1b4e9a 100644 (file)
@@ -131,7 +131,7 @@ void unmap_kernel_page(unsigned long va);
 #elif defined(CONFIG_44x)
 #include <asm/nohash/32/pte-44x.h>
 #elif defined(CONFIG_PPC_85xx) && defined(CONFIG_PTE_64BIT)
-#include <asm/nohash/pte-book3e.h>
+#include <asm/nohash/pte-e500.h>
 #elif defined(CONFIG_PPC_85xx)
 #include <asm/nohash/32/pte-85xx.h>
 #elif defined(CONFIG_PPC_8xx)
index 599921cc257e0ec4a6ea932356c081769aa9162d..879e9a6e5a870a49c1dbd5f8c37ac5086f359b22 100644 (file)
@@ -70,7 +70,7 @@
 /*
  * Include the PTE bits definitions
  */
-#include <asm/nohash/pte-book3e.h>
+#include <asm/nohash/pte-e500.h>
 
 #define PTE_RPN_MASK   (~((1UL << PTE_RPN_SHIFT) - 1))
 
similarity index 84%
rename from arch/powerpc/include/asm/nohash/hugetlb-book3e.h
rename to arch/powerpc/include/asm/nohash/hugetlb-e500.h
index ecd8694cb229bc53c949f28dff7df2269d656477..8f04ad20e0403eaa8cc7a6ae843fa7052a19f454 100644 (file)
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_POWERPC_NOHASH_HUGETLB_BOOK3E_H
-#define _ASM_POWERPC_NOHASH_HUGETLB_BOOK3E_H
+#ifndef _ASM_POWERPC_NOHASH_HUGETLB_E500_H
+#define _ASM_POWERPC_NOHASH_HUGETLB_E500_H
 
 static inline pte_t *hugepd_page(hugepd_t hpd)
 {
@@ -30,7 +30,7 @@ void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 
 static inline void hugepd_populate(hugepd_t *hpdp, pte_t *new, unsigned int pshift)
 {
-       /* We use the old format for PPC_FSL_BOOK3E */
+       /* We use the old format for PPC_E500 */
        *hpdp = __hugepd(((unsigned long)new & ~PD_HUGE) | pshift);
 }
 
@@ -42,4 +42,4 @@ static inline int check_and_get_huge_psize(int shift)
        return shift_to_mmu_psize(shift);
 }
 
-#endif /* _ASM_POWERPC_NOHASH_HUGETLB_BOOK3E_H */
+#endif /* _ASM_POWERPC_NOHASH_HUGETLB_E500_H */
index 4fd73c7412d0d5940f0c1de7c74d5eea4a558129..d9067dfc531ccdd3f739a7fb29407a38a355f5d9 100644 (file)
@@ -266,7 +266,7 @@ static inline int pud_huge(pud_t pud)
  * We use it to ensure coherency between the i-cache and d-cache
  * for the page which has just been mapped in.
  */
-#if defined(CONFIG_PPC_FSL_BOOK3E) && defined(CONFIG_HUGETLB_PAGE)
+#if defined(CONFIG_PPC_E500) && defined(CONFIG_HUGETLB_PAGE)
 void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);
 #else
 static inline
similarity index 96%
rename from arch/powerpc/include/asm/nohash/pte-book3e.h
rename to arch/powerpc/include/asm/nohash/pte-e500.h
index f798640422c2d6831de682e3b5a80a0b9c1ca389..0934e8965e4ed8ccb1c2cb6df13e24cde614b233 100644 (file)
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_POWERPC_NOHASH_PTE_BOOK3E_H
-#define _ASM_POWERPC_NOHASH_PTE_BOOK3E_H
+#ifndef _ASM_POWERPC_NOHASH_PTE_E500_H
+#define _ASM_POWERPC_NOHASH_PTE_E500_H
 #ifdef __KERNEL__
 
 /* PTE bit definitions for processors compliant to the Book3E
@@ -126,4 +126,4 @@ static inline pte_t pte_mkexec(pte_t pte)
 #endif /* __ASSEMBLY__ */
 
 #endif /* __KERNEL__ */
-#endif /*  _ASM_POWERPC_NOHASH_PTE_BOOK3E_H */
+#endif /*  _ASM_POWERPC_NOHASH_PTE_E500_H */
index 7f20636d13eddd15c89f007b6bb6cc604019bc9f..edf1dd1b0ca99e8de7fb58db22a6743ec27995ff 100644 (file)
@@ -31,7 +31,7 @@ extern unsigned int hpage_shift;
 #define HPAGE_SHIFT hpage_shift
 #elif defined(CONFIG_PPC_8xx)
 #define HPAGE_SHIFT            19      /* 512k pages */
-#elif defined(CONFIG_PPC_FSL_BOOK3E)
+#elif defined(CONFIG_PPC_E500)
 #define HPAGE_SHIFT            22      /* 4M pages */
 #endif
 #define HPAGE_SIZE             ((1UL) << HPAGE_SHIFT)
index 55149a0384dbfd61097abd55366c740ee497b2d4..7e4fe766e247991100bd0d1ca06feefd0940b505 100644 (file)
@@ -342,7 +342,7 @@ n:
 #endif
 
 /* various errata or part fixups */
-#if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_FSL_BOOK3E)
+#if defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_E500)
 #define MFTB(dest)                     \
 90:    mfspr dest, SPRN_TBRL;          \
 BEGIN_FTR_SECTION_NESTED(96);          \
@@ -768,7 +768,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
        stringify_in_c(.llong (_target);)       \
        stringify_in_c(.previous)
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 #define BTB_FLUSH(reg)                 \
        lis reg,BUCSR_INIT@h;           \
        ori reg,reg,BUCSR_INIT@l;       \
@@ -776,6 +776,6 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
        isync;
 #else
 #define BTB_FLUSH(reg)
-#endif /* CONFIG_PPC_FSL_BOOK3E */
+#endif /* CONFIG_PPC_E500 */
 
 #endif /* _ASM_POWERPC_PPC_ASM_H */
index dd461b2c825cd911dbd2e6ec6cf0e464b200777f..85143849a586f41d6455302191aad5ecc9fc82c2 100644 (file)
@@ -69,7 +69,7 @@ void do_barrier_nospec_fixups_range(bool enable, void *start, void *end);
 static inline void do_barrier_nospec_fixups_range(bool enable, void *start, void *end) { }
 #endif
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 void __init setup_spectre_v2(void);
 #else
 static inline void setup_spectre_v2(void) {}
index 33dafd12e81d7248eab54a0d50339b3b04430e75..658c4dffaa56d941093ce39bcce31043b5b02023 100644 (file)
@@ -114,7 +114,7 @@ endif
 obj64-$(CONFIG_HIBERNATION)    += swsusp_asm64.o
 obj-$(CONFIG_MODULES)          += module.o module_$(BITS).o
 obj-$(CONFIG_44x)              += cpu_setup_44x.o
-obj-$(CONFIG_PPC_FSL_BOOK3E)   += cpu_setup_fsl_booke.o
+obj-$(CONFIG_PPC_E500)         += cpu_setup_e500.o
 obj-$(CONFIG_PPC_DOORBELL)     += dbell.o
 obj-$(CONFIG_JUMP_LABEL)       += jump_label.o
 
index 10ce03052a194529077e636f0930b95b698f1175..4ce2a4aa3985436e3ff788c3b06223a931f86269 100644 (file)
@@ -59,7 +59,7 @@
 #endif
 #endif
 
-#if defined(CONFIG_PPC_FSL_BOOK3E)
+#if defined(CONFIG_PPC_E500)
 #include "../mm/mmu_decl.h"
 #endif
 
@@ -651,7 +651,7 @@ int main(void)
        DEFINE(PGD_T_LOG2, PGD_T_LOG2);
        DEFINE(PTE_T_LOG2, PTE_T_LOG2);
 #endif
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
        OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
        OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
index a2f82ced6e4aacc9a84b9348375810344313eb86..1047dc053b476ca8a0bc5d1452cd1f8f5de4745d 100644 (file)
@@ -34,7 +34,7 @@
  */
 #define THREAD_NORMSAVE(offset)        (THREAD_NORMSAVES + (offset * 4))
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 #define BOOKE_CLEAR_BTB(reg)                                                                   \
 START_BTB_FLUSH_SECTION                                                                \
        BTB_FLUSH(reg)                                                                  \
index 4b4ba3364665af4e5cdb6ff18ba9b43ede35f74d..a2d3abb4807507a8024f62470e6770cdc95e75b6 100644 (file)
@@ -230,7 +230,7 @@ _ASM_NOKPROBE_SYMBOL(system_call_common)
        std     r0,GPR0(r1)
        std     r10,GPR1(r1)
        std     r2,GPR2(r1)
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 START_BTB_FLUSH_SECTION
        BTB_FLUSH(r10)
 END_BTB_FLUSH_SECTION
index b562a1d2c7500700b04e2ca530512c6ece82ac6f..206475e3e0b480116719b69b0ddd0873f18dd529 100644 (file)
@@ -35,7 +35,7 @@ static enum branch_cache_flush_type link_stack_flush_type = BRANCH_CACHE_FLUSH_N
 bool barrier_nospec_enabled;
 static bool no_nospec;
 static bool btb_flush_enabled;
-#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
+#if defined(CONFIG_PPC_E500) || defined(CONFIG_PPC_BOOK3S_64)
 static bool no_spectrev2;
 #endif
 
@@ -122,7 +122,7 @@ static __init int security_feature_debugfs_init(void)
 device_initcall(security_feature_debugfs_init);
 #endif /* CONFIG_DEBUG_FS */
 
-#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
+#if defined(CONFIG_PPC_E500) || defined(CONFIG_PPC_BOOK3S_64)
 static int __init handle_nospectre_v2(char *p)
 {
        no_spectrev2 = true;
@@ -130,9 +130,9 @@ static int __init handle_nospectre_v2(char *p)
        return 0;
 }
 early_param("nospectre_v2", handle_nospectre_v2);
-#endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
+#endif /* CONFIG_PPC_E500 || CONFIG_PPC_BOOK3S_64 */
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 void __init setup_spectre_v2(void)
 {
        if (no_spectrev2 || cpu_mitigations_off())
@@ -140,7 +140,7 @@ void __init setup_spectre_v2(void)
        else
                btb_flush_enabled = true;
 }
-#endif /* CONFIG_PPC_FSL_BOOK3E */
+#endif /* CONFIG_PPC_E500 */
 
 #ifdef CONFIG_PPC_BOOK3S_64
 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
index 169703fead57668a8667ab483079f161546547d7..11ded19186b9103eb8f664304e5e0be4e3d0d2f3 100644 (file)
@@ -708,7 +708,7 @@ static struct task_struct *current_set[NR_CPUS];
 static void smp_store_cpu_info(int id)
 {
        per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        per_cpu(next_tlbcam_idx, id)
                = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
 #endif
index 3a10cda9c05ec775787e7199ed5adc4b7ccc6ce7..ef9a61718940369f887c187bddf0a6dbff3def06 100644 (file)
@@ -228,7 +228,7 @@ static void __init sysfs_create_dscr_default(void)
 }
 #endif /* CONFIG_PPC64 */
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 #define MAX_BIT                                63
 
 static u64 pw20_wt;
@@ -907,7 +907,7 @@ static int register_cpu_online(unsigned int cpu)
                device_create_file(s, &dev_attr_tscr);
 #endif /* CONFIG_PPC64 */
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        if (PVR_VER(cur_cpu_spec->pvr_value) == PVR_VER_E6500) {
                device_create_file(s, &dev_attr_pw20_state);
                device_create_file(s, &dev_attr_pw20_wait_time);
@@ -1003,7 +1003,7 @@ static int unregister_cpu_online(unsigned int cpu)
                device_remove_file(s, &dev_attr_tscr);
 #endif /* CONFIG_PPC64 */
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        if (PVR_VER(cur_cpu_spec->pvr_value) == PVR_VER_E6500) {
                device_remove_file(s, &dev_attr_pw20_state);
                device_remove_file(s, &dev_attr_pw20_wait_time);
index b60d81acccfcc82442ea7ddd2702b502e452c50b..c025c83dfdc3f413907e6638bbd52fa6c8c3a905 100644 (file)
@@ -239,7 +239,7 @@ SECTIONS
        }
 #endif /* CONFIG_PPC_BARRIER_NOSPEC */
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        . = ALIGN(8);
        __spec_btb_flush_fixup : AT(ADDR(__spec_btb_flush_fixup) - LOAD_OFFSET) {
                __start__btb_flush_fixup = .;
index 993d3f31832af676303ace05ff3443e4cbe930f6..31f40f544de547b826a9287d924376efa93a2f52 100644 (file)
@@ -550,7 +550,7 @@ void do_barrier_nospec_fixups(bool enable)
 }
 #endif /* CONFIG_PPC_BARRIER_NOSPEC */
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_end)
 {
        unsigned int instr[2], *dest;
@@ -602,7 +602,7 @@ void __init do_btb_flush_fixups(void)
        for (; start < end; start += 2)
                patch_btb_flush_section(start);
 }
-#endif /* CONFIG_PPC_FSL_BOOK3E */
+#endif /* CONFIG_PPC_E500 */
 
 void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
 {
index bc84a594ca62cb90cd6fe6056972fa5b2583c3c6..8c3ea5300ac304ef4c0356b077270b36539b2ed2 100644 (file)
@@ -623,7 +623,7 @@ static int __init hugetlbpage_init(void)
                if (pdshift > shift) {
                        if (!IS_ENABLED(CONFIG_PPC_8xx))
                                pgtable_cache_add(pdshift - shift);
-               } else if (IS_ENABLED(CONFIG_PPC_FSL_BOOK3E) ||
+               } else if (IS_ENABLED(CONFIG_PPC_E500) ||
                           IS_ENABLED(CONFIG_PPC_8xx)) {
                        pgtable_cache_add(PTE_T_ORDER);
                }
index 6ddbd6cb3a2acd98b00774fc2e232e7e6530320a..84d171953ba44eb4fbcfb42772da104404554ff3 100644 (file)
@@ -308,7 +308,7 @@ void __init mem_init(void)
        }
 #endif /* CONFIG_HIGHMEM */
 
-#if defined(CONFIG_PPC_FSL_BOOK3E) && !defined(CONFIG_SMP)
+#if defined(CONFIG_PPC_E500) && !defined(CONFIG_SMP)
        /*
         * If smp is enabled, next_tlbcam_idx is initialized in the cpu up
         * functions.... do it here for the non-smp case.
index 341c2e0c71d20af560eab4d348aa7ee2312931c1..bd9784f77f2ee23b295ba792df843cf82f00fd33 100644 (file)
@@ -111,7 +111,7 @@ void MMU_init_hw_patch(void);
 unsigned long mmu_mapin_ram(unsigned long base, unsigned long top);
 #endif
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
                                     bool dryrun, bool init);
 #ifdef CONFIG_PPC32
@@ -157,7 +157,7 @@ static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
 static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
 #endif
 
-#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC_FSL_BOOK3E)
+#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC_E500)
 void mmu_mark_initmem_nx(void);
 void mmu_mark_rodata_ro(void);
 #else
index b467a25ee155d16e61295a4da2a58816f9a42ec6..f3894e79d5f700f57d9f7a35e92c030ad1f49f5f 100644 (file)
@@ -7,13 +7,13 @@ obj-$(CONFIG_PPC_BOOK3E_64)   += tlb_low_64e.o book3e_pgtable.o
 obj-$(CONFIG_40x)              += 40x.o
 obj-$(CONFIG_44x)              += 44x.o
 obj-$(CONFIG_PPC_8xx)          += 8xx.o
-obj-$(CONFIG_PPC_FSL_BOOK3E)   += fsl_book3e.o
+obj-$(CONFIG_PPC_E500)         += e500.o
 obj-$(CONFIG_RANDOMIZE_BASE)   += kaslr_booke.o
 ifdef CONFIG_HUGETLB_PAGE
-obj-$(CONFIG_PPC_FSL_BOOK3E)   += book3e_hugetlbpage.o
+obj-$(CONFIG_PPC_E500) += e500_hugetlbpage.o
 endif
 
 # Disable kcov instrumentation on sensitive code
 # This is necessary for booting with kcov enabled on book3e machines
 KCOV_INSTRUMENT_tlb.o := n
-KCOV_INSTRUMENT_fsl_book3e.o := n
+KCOV_INSTRUMENT_e500.o := n
index f21896ebdc5afd5dc963680a56174c036760b397..fcb1e5ae5c55316048263ebe8191a02ab921af3f 100644 (file)
@@ -50,7 +50,7 @@
  * indirect page table entries.
  */
 #if defined(CONFIG_PPC_BOOK3E_MMU) || defined(CONFIG_PPC_8xx)
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = {
        [MMU_PAGE_4K] = {
                .shift  = 12,
@@ -166,7 +166,7 @@ int extlb_level_exc;
 
 #endif /* CONFIG_PPC64 */
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
 /* next_tlbcam_idx is used to round-robin tlbcam entry assignment */
 DEFINE_PER_CPU(int, next_tlbcam_idx);
 EXPORT_PER_CPU_SYMBOL(next_tlbcam_idx);
@@ -441,7 +441,7 @@ static void __init setup_page_sizes(void)
        unsigned int eptcfg;
        int i, psize;
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        unsigned int mmucfg = mfspr(SPRN_MMUCFG);
        int fsl_mmu = mmu_has_feature(MMU_FTR_TYPE_FSL_E);
 
@@ -584,7 +584,7 @@ static void __init setup_mmu_htw(void)
                patch_exception(0x1c0, exc_data_tlb_miss_htw_book3e);
                patch_exception(0x1e0, exc_instruction_tlb_miss_htw_book3e);
                break;
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        case PPC_HTW_E6500:
                extlb_level_exc = EX_TLB_SIZE;
                patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e);
@@ -627,7 +627,7 @@ static void early_init_this_mmu(void)
        }
        mtspr(SPRN_MAS4, mas4);
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
                unsigned int num_cams;
                bool map = true;
@@ -680,7 +680,7 @@ static void __init early_init_mmu_global(void)
        /* Look for HW tablewalk support */
        setup_mmu_htw();
 
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
                if (book3e_htw_mode == PPC_HTW_NONE) {
                        extlb_level_exc = EX_TLB_SIZE;
@@ -701,7 +701,7 @@ static void __init early_init_mmu_global(void)
 
 static void __init early_mmu_set_memory_limit(void)
 {
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
                /*
                 * Limit memory so we dont have linear faults.
@@ -750,7 +750,7 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
         * We crop it to the size of the first MEMBLOCK to
         * avoid going over total available memory just in case...
         */
-#ifdef CONFIG_PPC_FSL_BOOK3E
+#ifdef CONFIG_PPC_E500
        if (early_mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
                unsigned long linear_sz;
                unsigned int num_cams;
index 6914bc8e4eada339960a8e277da517c52249bbfa..e1199608ff4dcdfc878b68d4af01d127cd568685 100644 (file)
@@ -364,7 +364,7 @@ _GLOBAL(_tlbivax_bcast)
 #error Unsupported processor type !
 #endif
 
-#if defined(CONFIG_PPC_FSL_BOOK3E)
+#if defined(CONFIG_PPC_E500)
 /*
  * extern void loadcam_entry(unsigned int index)
  *
index 5b065186ace5f7db1318e24a9b8bfe36c0e4e593..32c60ad8f45d5fbfba62abe7e03c5fac698c8d2c 100644 (file)
@@ -107,7 +107,6 @@ config PPC_BOOK3S_64
 
 config PPC_BOOK3E_64
        bool "Embedded processors"
-       select PPC_FSL_BOOK3E
        select PPC_E500
        select PPC_E500MC
        select PPC_FPU # Make it a choice ?
@@ -259,8 +258,11 @@ config PPC_BOOK3S
 
 config PPC_E500
        select FSL_EMB_PERFMON
-       select PPC_FSL_BOOK3E
        bool
+       select ARCH_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
+       select PPC_SMP_MUXED_IPI
+       select PPC_DOORBELL
+       select PPC_KUEP
 
 config PPC_E500MC
        bool "e500mc Support"
@@ -320,16 +322,6 @@ config BOOKE_OR_40x
        depends on BOOKE || 40x
        default y
 
-# this is for common code between PPC32 & PPC64 FSL BOOKE
-config PPC_FSL_BOOK3E
-       bool
-       select ARCH_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
-       imply FSL_EMB_PERFMON
-       select PPC_SMP_MUXED_IPI
-       select PPC_DOORBELL
-       select PPC_KUEP
-       default y if PPC_85xx
-
 config PTE_64BIT
        bool
        depends on 44x || PPC_E500 || PPC_86xx