spin_unlock_irqrestore(&dev->spinlock, irq_flags);
                        dev_dbg(dev->class_dev, "fifo overflow\n");
                        outb(0, dev->iobase + PCI9111_INT_CLR_REG);
-                       async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+                       async->events |= COMEDI_CB_ERROR;
                        comedi_handle_events(dev, s);
 
                        return IRQ_HANDLED;
 
 
        if (intcsr & MASTER_ABORT_INT) {
                dev_err(dev->class_dev, "AMCC IRQ - MASTER DMA ABORT!\n");
-               s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               s->async->events |= COMEDI_CB_ERROR;
                goto interrupt_exit;
        }
 
        if (intcsr & TARGET_ABORT_INT) {
                dev_err(dev->class_dev, "AMCC IRQ - TARGET DMA ABORT!\n");
-               s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               s->async->events |= COMEDI_CB_ERROR;
                goto interrupt_exit;
        }
 
 
        status = inw(dev->iobase + PCI171x_STATUS);
        if (status & Status_FE) {
                dev_dbg(dev->class_dev, "A/D FIFO empty (%4x)\n", status);
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                return;
        }
        if (status & Status_FF) {
                dev_dbg(dev->class_dev,
                        "A/D FIFO Full status (Fatal Error!) (%4x)\n", status);
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                return;
        }
                val = inw(dev->iobase + PCI171x_AD_DATA);
                ret = pci171x_ai_dropout(dev, s, s->async->cur_chan, val);
                if (ret) {
-                       s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+                       s->async->events |= COMEDI_CB_ERROR;
                        break;
                }
 
 
                ret = pci171x_ai_dropout(dev, s, s->async->cur_chan, val);
                if (ret) {
-                       s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+                       s->async->events |= COMEDI_CB_ERROR;
                        return ret;
                }
 
        m = inw(dev->iobase + PCI171x_STATUS);
        if (!(m & Status_FH)) {
                dev_dbg(dev->class_dev, "A/D FIFO not half full! (%4x)\n", m);
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                return;
        }
        if (m & Status_FF) {
                dev_dbg(dev->class_dev,
                        "A/D FIFO Full status (Fatal Error!) (%4x)\n", m);
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                return;
        }
 
                outw(devpriv->adc_fifo_bits | LADFUL,
                     devpriv->control_status + INT_ADCFIFO);
                spin_unlock_irqrestore(&dev->spinlock, flags);
-               async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               async->events |= COMEDI_CB_ERROR;
        }
 
        comedi_handle_events(dev, s);
 
        /*  check for fifo overrun */
        if (status & ADC_OVERRUN_BIT) {
                dev_err(dev->class_dev, "fifo overrun\n");
-               async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               async->events |= COMEDI_CB_ERROR;
        }
        /*  spin lock makes sure no one else changes plx dma control reg */
        spin_lock_irqsave(&dev->spinlock, flags);
 
        /* this probably won't catch overruns since the card doesn't generate
         * overrun interrupts, but we might as well try */
        if (status & OVRUN) {
-               async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               async->events |= COMEDI_CB_ERROR;
                dev_err(dev->class_dev, "fifo overflow\n");
        }
 
 
                /*  clear OVF interrupt bit */
                outb(CLEAR_INTR_MASK & ~OVF, dev->iobase + DAS1800_STATUS);
                dev_err(dev->class_dev, "FIFO overflow\n");
-               async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                return;
        }
 
 
        if (fifo_overflow) {
                spin_unlock_irqrestore(&dev->spinlock, irq_flags);
-               async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                return IRQ_HANDLED;
        }
 
                dt3k_ai_empty_fifo(dev, s);
 
        if (status & (DT3000_ADSWERR | DT3000_ADHWERR))
-               s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               s->async->events |= COMEDI_CB_ERROR;
 
        debug_n_ints++;
        if (debug_n_ints >= 10)
 
 
        if (hpdi_board_status & RX_OVERRUN_BIT) {
                dev_err(dev->class_dev, "rx fifo overrun\n");
-               async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               async->events |= COMEDI_CB_ERROR;
        }
 
        if (hpdi_board_status & RX_UNDERRUN_BIT) {
                dev_err(dev->class_dev, "rx fifo underrun\n");
-               async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               async->events |= COMEDI_CB_ERROR;
        }
 
        if (devpriv->dio_count == 0)
 
                                 ME4000_AI_CTRL_BIT_SC_IRQ);
                        outl(tmp, dev->iobase + ME4000_AI_CTRL_REG);
 
-                       s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+                       s->async->events |= COMEDI_CB_ERROR;
 
                        dev_err(dev->class_dev, "FIFO overflow\n");
                } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
                                 ME4000_AI_CTRL_BIT_SC_IRQ);
                        outl(tmp, dev->iobase + ME4000_AI_CTRL_REG);
 
-                       s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+                       s->async->events |= COMEDI_CB_ERROR;
 
                        dev_err(dev->class_dev, "Undefined FIFO state\n");
                }
 
                return IRQ_NONE;
 
        if (status & OVFL_BIT) {
-               async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
        }
 
        if ((status & DMA_TC_BIT) == 0) {
-               async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                return IRQ_HANDLED;
        }
 
        }
        if (i == timeout) {
                dev_err(dev->class_dev, "ai timeout, fifo never empties\n");
-               async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               async->events |= COMEDI_CB_ERROR;
                return -1;
        }
 
        if (devpriv->stat1 & STAT1_OVERRUN) {
                /* clear error interrupt */
                devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
-               async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                dev_err(dev->class_dev, "overrun\n");
                return IRQ_HANDLED;
        if (devpriv->stat1 & STAT1_OVERFLOW) {
                /*  clear error interrupt */
                devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
-               async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               async->events |= COMEDI_CB_ERROR;
                comedi_handle_events(dev, s);
                dev_err(dev->class_dev, "overflow\n");
                return IRQ_HANDLED;
 
                dev_err(dev->class_dev,
                        "unknown mite interrupt (ai_mite_status=%08x)\n",
                        ai_mite_status);
-               s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
+               s->async->events |= COMEDI_CB_ERROR;
                /* disable_irq(dev->irq); */
        }
 #endif
                        /* we probably aren't even running a command now,
                         * so it's a good idea to be careful. */
                        if (comedi_is_subdevice_running(s)) {
-                               s->async->events |=
-                                   COMEDI_CB_ERROR | COMEDI_CB_EOA;
+                               s->async->events |= COMEDI_CB_ERROR;
                                comedi_handle_events(dev, s);
                        }
                        return;
                dev_err(dev->class_dev,
                        "unknown mite interrupt (ao_mite_status=%08x)\n",
                        ao_mite_status);
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
        }
 #endif
 
 
                                 CHSR_DRQ1 | CHSR_MRDY)) {
                        dev_dbg(dev->class_dev,
                                "unknown mite interrupt, disabling IRQ\n");
-                       async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+                       async->events |= COMEDI_CB_ERROR;
                        disable_irq(dev->irq);
                }
        }
                        break;
                } else if (flags & Waited) {
                        writeb(ClearWaited, dev->mmio + Group_1_First_Clear);
-                       async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+                       async->events |= COMEDI_CB_ERROR;
                        break;
                } else if (flags & PrimaryTC) {
                        writeb(ClearPrimaryTC,
 
 
        if (pcl812_ai_eoc(dev, s, NULL, 0)) {
                dev_dbg(dev->class_dev, "A/D cmd IRQ without DRDY!\n");
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                return;
        }
 
 
                        (devpriv->dma) ? "DMA" :
                        (devpriv->usefifo) ? "FIFO" : "IRQ",
                        chan, expected_chan);
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                return true;
        }
        return false;
 
        if (pcl818_ai_eoc(dev, s, NULL, 0)) {
                dev_err(dev->class_dev, "A/D mode1/3 IRQ without DRDY!\n");
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                return;
        }
 
 
        if (status & 4) {
                dev_err(dev->class_dev, "A/D mode1/3 FIFO overflow!\n");
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                return;
        }
 
        if (status & 1) {
                dev_err(dev->class_dev,
                        "A/D mode1/3 FIFO interrupt without data!\n");
-               s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+               s->async->events |= COMEDI_CB_ERROR;
                return;
        }
 
 
                        unsigned short data;
 
                        if (status & DAQP_STATUS_DATA_LOST) {
-                               s->async->events |=
-                                   COMEDI_CB_EOA | COMEDI_CB_OVERFLOW;
+                               s->async->events |= COMEDI_CB_OVERFLOW;
                                dev_warn(dev->class_dev, "data lost\n");
                                break;
                        }
                if (loop_limit <= 0) {
                        dev_warn(dev->class_dev,
                                 "loop_limit reached in daqp_interrupt()\n");
-                       s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
+                       s->async->events |= COMEDI_CB_ERROR;
                }
 
                comedi_handle_events(dev, s);