Revert "drm/amdgpu/nbio7.4: add hw bug workaround for vega20"

This reverts commit e01f2d41895102d824c6b8f5e011dd5e286d5e8b.

VG20 did not require this workaround, as the fix is in the VBIOS.
Leave VG10/12 workaround as some older shipped cards do not have the
VBIOS fix in place, and the kernel workaround is required in those
situations

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index b776332d979f7cd51862921fb2fdc5bac0c28992..238c2483496a85e4f1cc94868c90b1e54d5c1ab4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -308,13 +308,7 @@ static void nbio_v7_4_detect_hw_virt(struct amdgpu_device *adev)
 
 static void nbio_v7_4_init_registers(struct amdgpu_device *adev)
 {
-       uint32_t def, data;
-
-       def = data = RREG32_PCIE(smnPCIE_CI_CNTL);
-       data = REG_SET_FIELD(data, PCIE_CI_CNTL, CI_SLV_ORDERING_DIS, 1);
 
-       if (def != data)
-               WREG32_PCIE(smnPCIE_CI_CNTL, data);
 }
 
 static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device *adev)