boot_params->vpu_telemetry_enable);
        ivpu_dbg(vdev, FW_BOOT, "boot_params.dvfs_mode = %u\n",
                 boot_params->dvfs_mode);
+       ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_residency_time_us = %lld\n",
+                boot_params->d0i3_residency_time_us);
+       ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_entry_vpu_ts = %llu\n",
+                boot_params->d0i3_entry_vpu_ts);
 }
 
 void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params *boot_params)
 {
        struct ivpu_bo *ipc_mem_rx = vdev->ipc->mem_rx;
 
-       /* In case of warm boot we only have to reset the entrypoint addr */
+       /* In case of warm boot only update variable params */
        if (!ivpu_fw_is_cold_boot(vdev)) {
+               boot_params->d0i3_residency_time_us =
+                       ktime_us_delta(ktime_get_boottime(), vdev->hw->d0i3_entry_host_ts);
+               boot_params->d0i3_entry_vpu_ts = vdev->hw->d0i3_entry_vpu_ts;
+
+               ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_residency_time_us = %lld\n",
+                        boot_params->d0i3_residency_time_us);
+               ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_entry_vpu_ts = %llu\n",
+                        boot_params->d0i3_entry_vpu_ts);
+
                boot_params->save_restore_ret_address = 0;
                vdev->pm->is_warmboot = true;
                return;
        boot_params->punit_telemetry_sram_size = ivpu_hw_reg_telemetry_size_get(vdev);
        boot_params->vpu_telemetry_enable = ivpu_hw_reg_telemetry_enable_get(vdev);
        boot_params->dvfs_mode = vdev->fw->dvfs_mode;
+       boot_params->d0i3_residency_time_us = 0;
+       boot_params->d0i3_entry_vpu_ts = 0;
 
        wmb(); /* Flush WC buffers after writing bootparams */
 
 
               REG_TEST_FLD(VPU_37XX_BUTTRESS_VPU_STATUS, IDLE, val);
 }
 
+static void ivpu_hw_37xx_save_d0i3_entry_timestamp(struct ivpu_device *vdev)
+{
+       vdev->hw->d0i3_entry_host_ts = ktime_get_boottime();
+       vdev->hw->d0i3_entry_vpu_ts = REGV_RD64(VPU_37XX_CPU_SS_TIM_PERF_FREE_CNT);
+}
+
 static int ivpu_hw_37xx_power_down(struct ivpu_device *vdev)
 {
        int ret = 0;
 
+       ivpu_hw_37xx_save_d0i3_entry_timestamp(vdev);
+
        if (!ivpu_hw_37xx_is_idle(vdev) && ivpu_hw_37xx_reset(vdev))
                ivpu_err(vdev, "Failed to reset the VPU\n");