/* Check if we have an idle VMID */
        i = 0;
        list_for_each_entry((*idle), &id_mgr->ids_lru, list) {
-               fences[i] = amdgpu_sync_peek_fence(&(*idle)->active, ring);
+               /* Don't use per engine and per process VMID at the same time */
+               struct amdgpu_ring *r = adev->vm_manager.concurrent_flush ?
+                       NULL : ring;
+
+               fences[i] = amdgpu_sync_peek_fence(&(*idle)->active, r);
                if (!fences[i])
                        break;
                ++i;
        if (updates && (*id)->flushed_updates &&
            updates->context == (*id)->flushed_updates->context &&
            !dma_fence_is_later(updates, (*id)->flushed_updates))
-           updates = NULL;
+               updates = NULL;
 
        if ((*id)->owner != vm->immediate.fence_context ||
            job->vm_pd_addr != (*id)->pd_gpu_addr ||
             !dma_fence_is_signaled((*id)->last_flush))) {
                struct dma_fence *tmp;
 
+               /* Don't use per engine and per process VMID at the same time */
+               if (adev->vm_manager.concurrent_flush)
+                       ring = NULL;
+
                /* to prevent one context starved by another context */
                (*id)->pd_gpu_addr = 0;
                tmp = amdgpu_sync_peek_fence(&(*id)->active, ring);
                if (updates && (!flushed || dma_fence_is_later(updates, flushed)))
                        needs_flush = true;
 
-               /* Concurrent flushes are only possible starting with Vega10 and
-                * are broken on Navi10 and Navi14.
-                */
-               if (needs_flush && (adev->asic_type < CHIP_VEGA10 ||
-                                   adev->asic_type == CHIP_NAVI10 ||
-                                   adev->asic_type == CHIP_NAVI14))
+               if (needs_flush && !adev->vm_manager.concurrent_flush)
                        continue;
 
                /* Good, we can use this VMID. Remember this submission as
 
 {
        unsigned i;
 
+       /* Concurrent flushes are only possible starting with Vega10 and
+        * are broken on Navi10 and Navi14.
+        */
+       adev->vm_manager.concurrent_flush = !(adev->asic_type < CHIP_VEGA10 ||
+                                             adev->asic_type == CHIP_NAVI10 ||
+                                             adev->asic_type == CHIP_NAVI14);
        amdgpu_vmid_mgr_init(adev);
 
        adev->vm_manager.fence_context =