arm64: dts: renesas: white-hawk-single: Wire-up Ethernet TSN

On the V4H White Hawk Single board as opposed to the Quad board the
Ethernet TSN is wired up to a PHY (Marvel 88Q2110/QFN40).  Wire up the
connection and enable the TSN0.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240701145012.2342868-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts
index 2f79e5a6124897ef7902eef4cccf4bfefa629502..50a428572d9bd93343c7e630145b1a5125ac5181 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779g2-white-hawk-single.dts
@@ -24,3 +24,54 @@
        groups = "hscif0_data", "hscif0_ctrl";
        function = "hscif0";
 };
+
+&pfc {
+       tsn0_pins: tsn0 {
+               mux {
+                       groups = "tsn0_link", "tsn0_mdio", "tsn0_rgmii",
+                                "tsn0_txcrefclk";
+                       function = "tsn0";
+               };
+
+               link {
+                       groups = "tsn0_link";
+                       bias-disable;
+               };
+
+               mdio {
+                       groups = "tsn0_mdio";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+
+               rgmii {
+                       groups = "tsn0_rgmii";
+                       drive-strength = <24>;
+                       bias-disable;
+               };
+       };
+};
+
+&tsn0 {
+       pinctrl-0 = <&tsn0_pins>;
+       pinctrl-names = "default";
+       phy-mode = "rgmii";
+       phy-handle = <&phy3>;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
+               reset-post-delay-us = <4000>;
+
+               phy3: ethernet-phy@0 {
+                       compatible = "ethernet-phy-id002b.0980",
+                                    "ethernet-phy-ieee802.3-c22";
+                       reg = <0>;
+                       interrupt-parent = <&gpio4>;
+                       interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+               };
+       };
+};