ARM: dts: rockchip: Add gmac node for RK3128

RK3128's gmac is based on Synopsys Ethernet GMAC IP core.
Add it to the devicetree.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20231202124158.65615-3-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index 4e8b38604ecd4989d8e5caaab3e3e7577e7c259a..c0c9f0eaffa387a335d3843bd46763866f2c49fa 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -525,6 +525,34 @@
                #dma-cells = <1>;
        };
 
+       gmac: ethernet@2008c000 {
+               compatible = "rockchip,rk3128-gmac";
+               reg = <0x2008c000 0x4000>;
+               interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "macirq", "eth_wake_irq";
+               clocks = <&cru SCLK_MAC>,
+                        <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
+                        <&cru SCLK_MAC_REF>, <&cru SCLK_MAC_REFOUT>,
+                        <&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
+               clock-names = "stmmaceth",
+                             "mac_clk_rx", "mac_clk_tx",
+                             "clk_mac_ref", "clk_mac_refout",
+                             "aclk_mac", "pclk_mac";
+               resets = <&cru SRST_GMAC>;
+               reset-names = "stmmaceth";
+               rockchip,grf = <&grf>;
+               rx-fifo-depth = <4096>;
+               tx-fifo-depth = <2048>;
+               status = "disabled";
+
+               mdio: mdio {
+                       compatible = "snps,dwmac-mdio";
+                       #address-cells = <0x1>;
+                       #size-cells = <0x0>;
+               };
+       };
+
        pinctrl: pinctrl {
                compatible = "rockchip,rk3128-pinctrl";
                rockchip,grf = <&grf>;