media: verisilicon: imx8m: Use the default Hantro G1 irq handler

The existing imx8m_vpu_g1_irq implementation is an exact copy of the
default hantro_g1_irq one. Switch over to it instead of keeping a
duplicated implementation.

Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
index 35799da534edcaf9446f3fd46b0350e6f0589eb0..f9f276385c11786c4fda9f02f71ec699f57b84f5 100644 (file)
--- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
+++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
@@ -234,24 +234,6 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = {
        },
 };
 
-static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
-{
-       struct hantro_dev *vpu = dev_id;
-       enum vb2_buffer_state state;
-       u32 status;
-
-       status = vdpu_read(vpu, G1_REG_INTERRUPT);
-       state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
-                VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
-       vdpu_write(vpu, 0, G1_REG_INTERRUPT);
-       vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
-       hantro_irq_done(vpu, state);
-
-       return IRQ_HANDLED;
-}
-
 static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
 {
        vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
@@ -328,7 +310,7 @@ static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = {
  */
 
 static const struct hantro_irq imx8mq_irqs[] = {
-       { "g1", imx8m_vpu_g1_irq },
+       { "g1", hantro_g1_irq },
 };
 
 static const struct hantro_irq imx8mq_g2_irqs[] = {