]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
clk: rockchip: rk3128: Drop CLK_NR_CLKS usage
authorAlex Bee <knaerzche@gmail.com>
Thu, 6 Jun 2024 14:33:58 +0000 (16:33 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Sat, 8 Jun 2024 13:56:35 +0000 (15:56 +0200)
In order to get rid of CLK_NR_CLKS and be able to drop it from the
bindings, use rockchip_clk_find_max_clk_id helper to find the highest
clock id.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20240606143401.32454-3-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3128.c

index d076b7971f33dddf2d84832291f37b4239125c09..40e0e4556d599857b47c154d77291847e3c37902 100644 (file)
@@ -569,18 +569,22 @@ static const char *const rk3128_critical_clocks[] __initconst = {
        "sclk_timer5",
 };
 
-static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
+static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np,
+                                                                  unsigned long soc_nr_clks)
 {
        struct rockchip_clk_provider *ctx;
+       unsigned long common_nr_clks;
        void __iomem *reg_base;
 
+       common_nr_clks = rockchip_clk_find_max_clk_id(common_clk_branches,
+                                                     ARRAY_SIZE(common_clk_branches)) + 1;
        reg_base = of_iomap(np, 0);
        if (!reg_base) {
                pr_err("%s: could not map cru region\n", __func__);
                return ERR_PTR(-ENOMEM);
        }
 
-       ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
+       ctx = rockchip_clk_init(np, reg_base, max(common_nr_clks, soc_nr_clks));
        if (IS_ERR(ctx)) {
                pr_err("%s: rockchip clk init failed\n", __func__);
                iounmap(reg_base);
@@ -609,8 +613,12 @@ static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device
 static void __init rk3126_clk_init(struct device_node *np)
 {
        struct rockchip_clk_provider *ctx;
+       unsigned long soc_nr_clks;
 
-       ctx = rk3128_common_clk_init(np);
+       soc_nr_clks = rockchip_clk_find_max_clk_id(rk3126_clk_branches,
+                                                  ARRAY_SIZE(rk3126_clk_branches)) + 1;
+
+       ctx = rk3128_common_clk_init(np, soc_nr_clks);
        if (IS_ERR(ctx))
                return;
 
@@ -627,8 +635,12 @@ CLK_OF_DECLARE(rk3126_cru, "rockchip,rk3126-cru", rk3126_clk_init);
 static void __init rk3128_clk_init(struct device_node *np)
 {
        struct rockchip_clk_provider *ctx;
+       unsigned long soc_nr_clks;
+
+       soc_nr_clks = rockchip_clk_find_max_clk_id(rk3128_clk_branches,
+                                                  ARRAY_SIZE(rk3128_clk_branches)) + 1;
 
-       ctx = rk3128_common_clk_init(np);
+       ctx = rk3128_common_clk_init(np, soc_nr_clks);
        if (IS_ERR(ctx))
                return;