drm/amdgpu/vcn:Add SPG mode Register XX check

Add Static Power Gate mode Register XX check

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 3275eaff6fba80fb595fb678137ce6cd80aa3346..afb174ffc1d0b2a4c56e68817e1c7f9be3e3fbb9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -840,6 +840,10 @@ static int vcn_v1_0_start_spg_mode(struct amdgpu_device *adev)
 
        vcn_v1_0_mc_resume_spg_mode(adev);
 
+       WREG32_SOC15(UVD, 0, mmUVD_REG_XX_MASK, 0x10);
+       WREG32_SOC15(UVD, 0, mmUVD_RBC_XX_IB_REG_CHECK,
+               RREG32_SOC15(UVD, 0, mmUVD_RBC_XX_IB_REG_CHECK) | 0x3);
+
        /* take all subblocks out of reset, except VCPU */
        WREG32_SOC15(UVD, 0, mmUVD_SOFT_RESET,
                        UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);