if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
            in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
                return true;
-       return dev->mdev->port_caps[port_num - 1].has_smi;
+       return dev->port_caps[port_num - 1].has_smi;
 }
 
 static int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey,
 
        packet_error = be16_to_cpu(out_mad->status);
 
-       dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
+       dev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
                MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
 
 out:
        props->port_cap_flags   = be32_to_cpup((__be32 *)(out_mad->data + 20));
        props->gid_tbl_len      = out_mad->data[50];
        props->max_msg_sz       = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
-       props->pkey_tbl_len     = mdev->port_caps[port - 1].pkey_table_len;
+       props->pkey_tbl_len     = dev->port_caps[port - 1].pkey_table_len;
        props->bad_pkey_cntr    = be16_to_cpup((__be16 *)(out_mad->data + 46));
        props->qkey_viol_cntr   = be16_to_cpup((__be16 *)(out_mad->data + 48));
        props->active_width     = out_mad->data[31] & 0xf;
 
        /* If reported active speed is QDR, check if is FDR-10 */
        if (props->active_speed == 4) {
-               if (mdev->port_caps[port - 1].ext_port_cap &
+               if (dev->port_caps[port - 1].ext_port_cap &
                    MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
                        init_query_mad(in_mad);
                        in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
 
        int err;
        int port;
 
-       for (port = 1; port <= ARRAY_SIZE(dev->mdev->port_caps); port++) {
-               dev->mdev->port_caps[port - 1].has_smi = false;
+       for (port = 1; port <= ARRAY_SIZE(dev->port_caps); port++) {
+               dev->port_caps[port - 1].has_smi = false;
                if (MLX5_CAP_GEN(dev->mdev, port_type) ==
                    MLX5_CAP_PORT_TYPE_IB) {
                        if (MLX5_CAP_GEN(dev->mdev, ib_virt)) {
                                                    port, err);
                                        return err;
                                }
-                               dev->mdev->port_caps[port - 1].has_smi =
+                               dev->port_caps[port - 1].has_smi =
                                        vport_ctx.has_smi;
                        } else {
-                               dev->mdev->port_caps[port - 1].has_smi = true;
+                               dev->port_caps[port - 1].has_smi = true;
                        }
                }
        }
                goto out;
        }
 
-       dev->mdev->port_caps[port - 1].pkey_table_len =
-                                       dprops->max_pkeys;
-       dev->mdev->port_caps[port - 1].gid_table_len =
-                                       pprops->gid_tbl_len;
+       dev->port_caps[port - 1].pkey_table_len = dprops->max_pkeys;
+       dev->port_caps[port - 1].gid_table_len = pprops->gid_tbl_len;
        mlx5_ib_dbg(dev, "port %d: pkey_table_len %d, gid_table_len %d\n",
                    port, dprops->max_pkeys, pprops->gid_tbl_len);
 
 
        u64 num_var_hw_entries;
 };
 
+struct mlx5_port_caps {
+       int gid_table_len;
+       int pkey_table_len;
+       bool has_smi;
+       u8 ext_port_cap;
+};
+
 struct mlx5_ib_dev {
        struct ib_device                ib_dev;
        struct mlx5_core_dev            *mdev;
        struct mlx5_var_table var_table;
 
        struct xarray sig_mrs;
+       struct mlx5_port_caps port_caps[MLX5_MAX_PORTS];
 };
 
 static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq)
 
 
        if (ah_flags & IB_AH_GRH) {
                if (grh->sgid_index >=
-                   dev->mdev->port_caps[port - 1].gid_table_len) {
+                   dev->port_caps[port - 1].gid_table_len) {
                        pr_err("sgid_index (%u) too large. max is %d\n",
                               grh->sgid_index,
-                              dev->mdev->port_caps[port - 1].gid_table_len);
+                              dev->port_caps[port - 1].gid_table_len);
                        return -EINVAL;
                }
        }
        if (attr_mask & IB_QP_PKEY_INDEX) {
                port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
                if (attr->pkey_index >=
-                   dev->mdev->port_caps[port - 1].pkey_table_len) {
+                   dev->port_caps[port - 1].pkey_table_len) {
                        mlx5_ib_dbg(dev, "invalid pkey index %d\n",
                                    attr->pkey_index);
                        goto out;
 
                        handle_qpt_uc(wr, &seg, &size);
                        break;
                case IB_QPT_SMI:
-                       if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) {
+                       if (unlikely(!dev->port_caps[qp->port - 1].has_smi)) {
                                mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n");
                                err = -EPERM;
                                *bad_wr = wr;
 
        struct mlx5_cmd_stats *stats;
 };
 
-struct mlx5_port_caps {
-       int     gid_table_len;
-       int     pkey_table_len;
-       u8      ext_port_cap;
-       bool    has_smi;
-};
-
 struct mlx5_cmd_mailbox {
        void           *buf;
        dma_addr_t      dma;
        u8                      rev_id;
        char                    board_id[MLX5_BOARD_ID_LEN];
        struct mlx5_cmd         cmd;
-       struct mlx5_port_caps   port_caps[MLX5_MAX_PORTS];
        struct {
                u32 hca_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
                u32 hca_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];