struct amdgpu_device *adev = crtc->dev->dev_private;
        u32 tmp;
 
+       WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,
+              upper_32_bits(amdgpu_crtc->cursor_addr));
+       WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,
+              lower_32_bits(amdgpu_crtc->cursor_addr));
+
        tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
        tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 1);
        tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_MODE, 2);
        return 0;
 }
 
-static void dce_v10_0_set_cursor(struct drm_crtc *crtc)
-{
-       struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-       struct amdgpu_device *adev = crtc->dev->dev_private;
-
-       WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,
-              upper_32_bits(amdgpu_crtc->cursor_addr));
-       WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,
-              lower_32_bits(amdgpu_crtc->cursor_addr));
-}
-
 static int dce_v10_0_crtc_cursor_move(struct drm_crtc *crtc,
                                      int x, int y)
 {
                amdgpu_crtc->cursor_hot_y = hot_y;
        }
 
-       dce_v10_0_set_cursor(crtc);
        dce_v10_0_show_cursor(crtc);
        dce_v10_0_lock_cursor(crtc, false);
 
                dce_v10_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,
                                             amdgpu_crtc->cursor_y);
 
-               dce_v10_0_set_cursor(crtc);
                dce_v10_0_show_cursor(crtc);
 
                dce_v10_0_lock_cursor(crtc, false);