int mlx4_crdump_collect(struct mlx4_dev *dev)
 {
        struct devlink *devlink = priv_to_devlink(mlx4_priv(dev));
+       struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
        struct pci_dev *pdev = dev->persist->pdev;
        unsigned long cr_res_size;
        u8 __iomem *cr_space;
                return 0;
        }
 
+       if (!crdump->snapshot_enable) {
+               mlx4_info(dev, "crdump: devlink snapshot disabled, skipping\n");
+               return 0;
+       }
+
        cr_res_size = pci_resource_len(pdev, 0);
 
        cr_space = ioremap(pci_resource_start(pdev, 0), cr_res_size);
        struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
        struct pci_dev *pdev = dev->persist->pdev;
 
+       crdump->snapshot_enable = false;
+
        /* Create cr-space region */
        crdump->region_crspace =
                devlink_region_create(devlink,
 
        return 0;
 }
 
+static int mlx4_devlink_crdump_snapshot_get(struct devlink *devlink, u32 id,
+                                           struct devlink_param_gset_ctx *ctx)
+{
+       struct mlx4_priv *priv = devlink_priv(devlink);
+       struct mlx4_dev *dev = &priv->dev;
+
+       ctx->val.vbool = dev->persist->crdump.snapshot_enable;
+       return 0;
+}
+
+static int mlx4_devlink_crdump_snapshot_set(struct devlink *devlink, u32 id,
+                                           struct devlink_param_gset_ctx *ctx)
+{
+       struct mlx4_priv *priv = devlink_priv(devlink);
+       struct mlx4_dev *dev = &priv->dev;
+
+       dev->persist->crdump.snapshot_enable = ctx->val.vbool;
+       return 0;
+}
+
 static int
 mlx4_devlink_max_macs_validate(struct devlink *devlink, u32 id,
                               union devlink_param_value val,
        DEVLINK_PARAM_GENERIC(MAX_MACS,
                              BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
                              NULL, NULL, mlx4_devlink_max_macs_validate),
+       DEVLINK_PARAM_GENERIC(REGION_SNAPSHOT,
+                             BIT(DEVLINK_PARAM_CMODE_RUNTIME) |
+                             BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
+                             mlx4_devlink_crdump_snapshot_get,
+                             mlx4_devlink_crdump_snapshot_set, NULL),
        DEVLINK_PARAM_DRIVER(MLX4_DEVLINK_PARAM_ID_ENABLE_64B_CQE_EQE,
                             "enable_64b_cqe_eqe", DEVLINK_PARAM_TYPE_BOOL,
                             BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
        mlx4_devlink_set_init_value(devlink,
                                    MLX4_DEVLINK_PARAM_ID_ENABLE_4K_UAR,
                                    value);
+
+       value.vbool = false;
+       mlx4_devlink_set_init_value(devlink,
+                                   DEVLINK_PARAM_GENERIC_ID_REGION_SNAPSHOT,
+                                   value);
 }
 
 static inline void mlx4_set_num_reserved_uars(struct mlx4_dev *dev,
 
 static void mlx4_devlink_param_load_driverinit_values(struct devlink *devlink)
 {
+       struct mlx4_priv *priv = devlink_priv(devlink);
+       struct mlx4_dev *dev = &priv->dev;
+       struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
        union devlink_param_value saved_value;
        int err;
 
                                                 &saved_value);
        if (!err)
                enable_4k_uar = saved_value.vbool;
+       err = devlink_param_driverinit_value_get(devlink,
+                                                DEVLINK_PARAM_GENERIC_ID_REGION_SNAPSHOT,
+                                                &saved_value);
+       if (!err && crdump->snapshot_enable != saved_value.vbool) {
+               crdump->snapshot_enable = saved_value.vbool;
+               devlink_param_value_changed(devlink,
+                                           DEVLINK_PARAM_GENERIC_ID_REGION_SNAPSHOT);
+       }
 }
 
 static int mlx4_devlink_reload(struct devlink *devlink,