ARM: shmobile: r8a7779: add HSPI support to DTSI

Based on work for the r8a7778 SoC by Kuninori Morimoto.

Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 8284715feec23b67568667f567712347d77c49b5..d0561d4c7c466056096969331d467f6196b9ff63 100644 (file)
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -42,6 +42,12 @@
                };
        };
 
+       aliases {
+               spi0 = &hspi0;
+               spi1 = &hspi1;
+               spi2 = &hspi2;
+       };
+
         gic: interrupt-controller@f0001000 {
                 compatible = "arm,cortex-a9-gic";
                 #interrupt-cells = <3>;
@@ -248,4 +254,28 @@
                cap-sdio-irq;
                status = "disabled";
        };
+
+       hspi0: spi@fffc7000 {
+               compatible = "renesas,hspi";
+               reg = <0xfffc7000 0x18>;
+               interrupt-controller = <&gic>;
+               interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+       };
+
+       hspi1: spi@fffc8000 {
+               compatible = "renesas,hspi";
+               reg = <0xfffc8000 0x18>;
+               interrupt-controller = <&gic>;
+               interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+       };
+
+       hspi2: spi@fffc6000 {
+               compatible = "renesas,hspi";
+               reg = <0xfffc6000 0x18>;
+               interrupt-controller = <&gic>;
+               interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+       };
 };