drm/msm/adreno: push dump/show stuff to base class

Add ptr to list of interesting registers to 'struct adreno_gpu' and use
that to move most of the debugfs show and register dump bits down into
adreno_gpu.  This will avoid duplication as support for additional
adreno generations is added.

Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index b7116cb9b41c9873f89eeb60ffc0173fa886ee8a..218c5b0603989b3474ef7815b91d6ec0371ab013 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -385,58 +385,26 @@ static const unsigned int a3xx_registers[] = {
        0x2750, 0x2756, 0x2760, 0x2760, 0x300c, 0x300e, 0x301c, 0x301d,
        0x302a, 0x302a, 0x302c, 0x302d, 0x3030, 0x3031, 0x3034, 0x3036,
        0x303c, 0x303c, 0x305e, 0x305f,
+       ~0   /* sentinel */
 };
 
 #ifdef CONFIG_DEBUG_FS
 static void a3xx_show(struct msm_gpu *gpu, struct seq_file *m)
 {
-       int i;
-
-       adreno_show(gpu, m);
-
        gpu->funcs->pm_resume(gpu);
-
        seq_printf(m, "status:   %08x\n",
                        gpu_read(gpu, REG_A3XX_RBBM_STATUS));
-
-       /* dump these out in a form that can be parsed by demsm: */
-       seq_printf(m, "IO:region %s 00000000 00020000\n", gpu->name);
-       for (i = 0; i < ARRAY_SIZE(a3xx_registers); i += 2) {
-               uint32_t start = a3xx_registers[i];
-               uint32_t end   = a3xx_registers[i+1];
-               uint32_t addr;
-
-               for (addr = start; addr <= end; addr++) {
-                       uint32_t val = gpu_read(gpu, addr);
-                       seq_printf(m, "IO:R %08x %08x\n", addr<<2, val);
-               }
-       }
-
        gpu->funcs->pm_suspend(gpu);
+       adreno_show(gpu, m);
 }
 #endif
 
 /* would be nice to not have to duplicate the _show() stuff with printk(): */
 static void a3xx_dump(struct msm_gpu *gpu)
 {
-       int i;
-
-       adreno_dump(gpu);
        printk("status:   %08x\n",
                        gpu_read(gpu, REG_A3XX_RBBM_STATUS));
-
-       /* dump these out in a form that can be parsed by demsm: */
-       printk("IO:region %s 00000000 00020000\n", gpu->name);
-       for (i = 0; i < ARRAY_SIZE(a3xx_registers); i += 2) {
-               uint32_t start = a3xx_registers[i];
-               uint32_t end   = a3xx_registers[i+1];
-               uint32_t addr;
-
-               for (addr = start; addr <= end; addr++) {
-                       uint32_t val = gpu_read(gpu, addr);
-                       printk("IO:R %08x %08x\n", addr<<2, val);
-               }
-       }
+       adreno_dump(gpu);
 }
 
 static const struct adreno_gpu_funcs funcs = {
@@ -494,6 +462,8 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
        gpu->perfcntrs = perfcntrs;
        gpu->num_perfcntrs = ARRAY_SIZE(perfcntrs);
 
+       adreno_gpu->registers = a3xx_registers;
+
        ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs);
        if (ret)
                goto fail;

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index d25f85cdcf904aba7c1b62dcff3c2ee84ee7574d..6afa29167fee74fffaae26e8d7ded15d05ec87eb 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -212,6 +212,7 @@ void adreno_idle(struct msm_gpu *gpu)
 void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
 {
        struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+       int i;
 
        seq_printf(m, "revision: %d (%d.%d.%d.%d)\n",
                        adreno_gpu->info->revn, adreno_gpu->rev.core,
@@ -223,6 +224,23 @@ void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
        seq_printf(m, "rptr:     %d\n", adreno_gpu->memptrs->rptr);
        seq_printf(m, "wptr:     %d\n", adreno_gpu->memptrs->wptr);
        seq_printf(m, "rb wptr:  %d\n", get_wptr(gpu->rb));
+
+       gpu->funcs->pm_resume(gpu);
+
+       /* dump these out in a form that can be parsed by demsm: */
+       seq_printf(m, "IO:region %s 00000000 00020000\n", gpu->name);
+       for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) {
+               uint32_t start = adreno_gpu->registers[i];
+               uint32_t end   = adreno_gpu->registers[i+1];
+               uint32_t addr;
+
+               for (addr = start; addr <= end; addr++) {
+                       uint32_t val = gpu_read(gpu, addr);
+                       seq_printf(m, "IO:R %08x %08x\n", addr<<2, val);
+               }
+       }
+
+       gpu->funcs->pm_suspend(gpu);
 }
 #endif
 
@@ -230,6 +248,7 @@ void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
 void adreno_dump(struct msm_gpu *gpu)
 {
        struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+       int i;
 
        printk("revision: %d (%d.%d.%d.%d)\n",
                        adreno_gpu->info->revn, adreno_gpu->rev.core,
@@ -242,6 +261,18 @@ void adreno_dump(struct msm_gpu *gpu)
        printk("wptr:     %d\n", adreno_gpu->memptrs->wptr);
        printk("rb wptr:  %d\n", get_wptr(gpu->rb));
 
+       /* dump these out in a form that can be parsed by demsm: */
+       printk("IO:region %s 00000000 00020000\n", gpu->name);
+       for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) {
+               uint32_t start = adreno_gpu->registers[i];
+               uint32_t end   = adreno_gpu->registers[i+1];
+               uint32_t addr;
+
+               for (addr = start; addr <= end; addr++) {
+                       uint32_t val = gpu_read(gpu, addr);
+                       printk("IO:R %08x %08x\n", addr<<2, val);
+               }
+       }
 }
 
 static uint32_t ring_freewords(struct msm_gpu *gpu)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 3664a0d98662327fc34ae07acebee581a0fc479a..52f0515797532cef0d4496918fe421306946d0a5 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -64,6 +64,9 @@ struct adreno_gpu {
        uint32_t revn;  /* numeric revision name */
        const struct adreno_gpu_funcs *funcs;
 
+       /* interesting register offsets to dump: */
+       const unsigned int *registers;
+
        /* firmware: */
        const struct firmware *pm4, *pfp;