drm/amdkfd: add helper to generate cache info from gfx config

Rather than using hardcoded tables, we can use the gfx and
gmc config pulled from the IP discovery table to generate the
cache configuration.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 90c70adc946cdc0fde11f81ea3308f01e0cb9aa1..51e1c982ad2a44f8b09f8e2b4ff4352e98e56291 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -1315,6 +1315,78 @@ static int fill_in_l2_l3_pcache(struct crat_subtype_cache *pcache,
        return 1;
 }
 
+static int kfd_fill_gpu_cache_info_from_gfx_config(struct kfd_dev *kdev,
+                                                  struct kfd_gpu_cache_info *pcache_info)
+{
+       struct amdgpu_device *adev = kdev->adev;
+       int i = 0;
+
+       /* TCP L1 Cache per CU */
+       if (adev->gfx.config.gc_tcp_l1_size) {
+               pcache_info[i].cache_size = adev->gfx.config.gc_tcp_l1_size;
+               pcache_info[i].cache_level = 1;
+               pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
+                                       CRAT_CACHE_FLAGS_DATA_CACHE |
+                                       CRAT_CACHE_FLAGS_SIMD_CACHE);
+               pcache_info[0].num_cu_shared = adev->gfx.config.gc_num_tcp_per_wpg / 2;
+               i++;
+       }
+       /* Scalar L1 Instruction Cache per SQC */
+       if (adev->gfx.config.gc_l1_instruction_cache_size_per_sqc) {
+               pcache_info[i].cache_size =
+                       adev->gfx.config.gc_l1_instruction_cache_size_per_sqc;
+               pcache_info[i].cache_level = 1;
+               pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
+                                       CRAT_CACHE_FLAGS_INST_CACHE |
+                                       CRAT_CACHE_FLAGS_SIMD_CACHE);
+               pcache_info[i].num_cu_shared = adev->gfx.config.gc_num_sqc_per_wgp * 2;
+               i++;
+       }
+       /* Scalar L1 Data Cache per SQC */
+       if (adev->gfx.config.gc_l1_data_cache_size_per_sqc) {
+               pcache_info[i].cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc;
+               pcache_info[i].cache_level = 1;
+               pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
+                                       CRAT_CACHE_FLAGS_DATA_CACHE |
+                                       CRAT_CACHE_FLAGS_SIMD_CACHE);
+               pcache_info[i].num_cu_shared = adev->gfx.config.gc_num_sqc_per_wgp * 2;
+               i++;
+       }
+       /* GL1 Data Cache per SA */
+       if (adev->gfx.config.gc_gl1c_per_sa &&
+           adev->gfx.config.gc_gl1c_size_per_instance) {
+               pcache_info[i].cache_size = adev->gfx.config.gc_gl1c_per_sa *
+                       adev->gfx.config.gc_gl1c_size_per_instance;
+               pcache_info[i].cache_level = 1;
+               pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
+                                       CRAT_CACHE_FLAGS_DATA_CACHE |
+                                       CRAT_CACHE_FLAGS_SIMD_CACHE);
+               pcache_info[i].num_cu_shared = adev->gfx.config.max_cu_per_sh;
+               i++;
+       }
+       /* L2 Data Cache per GPU (Total Tex Cache) */
+       if (adev->gfx.config.gc_gl2c_per_gpu) {
+               pcache_info[i].cache_size = adev->gfx.config.gc_gl2c_per_gpu;
+               pcache_info[i].cache_level = 2;
+               pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
+                                       CRAT_CACHE_FLAGS_DATA_CACHE |
+                                       CRAT_CACHE_FLAGS_SIMD_CACHE);
+               pcache_info[i].num_cu_shared = adev->gfx.config.max_cu_per_sh;
+               i++;
+       }
+       /* L3 Data Cache per GPU */
+       if (adev->gmc.mall_size) {
+               pcache_info[i].cache_size = adev->gmc.mall_size / 1024;
+               pcache_info[i].cache_level = 3;
+               pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
+                                       CRAT_CACHE_FLAGS_DATA_CACHE |
+                                       CRAT_CACHE_FLAGS_SIMD_CACHE);
+               pcache_info[i].num_cu_shared = adev->gfx.config.max_cu_per_sh;
+               i++;
+       }
+       return i;
+}
+
 /* kfd_fill_gpu_cache_info - Fill GPU cache info using kfd_gpu_cache_info
  * tables
  *