drm/amd/display: Fix no display on Fiji

Allocate memory for the second pipe allocate_mem_input() needs to
be done prior to program pipe front end. It shows sensitive to
Fiji. Failure to do so will cause error in allocate memory 
allocate_mem_input() on the second connected display.

Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 2a6d3ca1295439e171048bdfd36d89ef31986886..399a5984ada3ab0d61f48efc44add1c3bf77f496 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1370,16 +1370,6 @@ static enum dc_status apply_single_controller_ctx_to_hw(
 
        pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0;
 
-       /* mst support - use total stream count */
-       if (pipe_ctx->plane_res.mi != NULL) {
-               pipe_ctx->plane_res.mi->funcs->allocate_mem_input(
-                               pipe_ctx->plane_res.mi,
-                               stream->timing.h_total,
-                               stream->timing.v_total,
-                               stream->timing.pix_clk_khz,
-                               context->stream_count);
-       }
-
        pipe_ctx->stream->sink->link->psr_enabled = false;
 
        return DC_OK;
@@ -2891,6 +2881,15 @@ static void dce110_apply_ctx_for_surface(
                if (pipe_ctx->stream != stream)
                        continue;
 
+               /* Need to allocate mem before program front end for Fiji */
+               if (pipe_ctx->plane_res.mi != NULL)
+                       pipe_ctx->plane_res.mi->funcs->allocate_mem_input(
+                                       pipe_ctx->plane_res.mi,
+                                       pipe_ctx->stream->timing.h_total,
+                                       pipe_ctx->stream->timing.v_total,
+                                       pipe_ctx->stream->timing.pix_clk_khz,
+                                       context->stream_count);
+
                dce110_program_front_end_for_pipe(dc, pipe_ctx);
                program_surface_visibility(dc, pipe_ctx);