arm64: dts: rockchip: enable NPU on ROCK 5B

The NPU on the ROCK5B uses the same regulator for both the sram-supply
and the npu's supply. Add this regulator, and enable all the NPU bits.
Also add the regulator as a domain-supply to the pd_npu power domain.

v8:
- Remove notion of top core (Robin Murphy)

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/20250721-6-10-rocket-v9-10-77ebd484941e@tomeuvizoso.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
index 973d39a7e0e09897ee72a89c836ecdc6e2cf91b5..612808d2b4c5d4c0de998798a0ce3002f64b32e0 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
@@ -268,6 +268,29 @@
        };
 };
 
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1m2_xfer>;
+       status = "okay";
+
+       vdd_npu_s0: regulator@42 {
+               compatible = "rockchip,rk8602";
+               reg = <0x42>;
+               fcs,suspend-voltage-selector = <1>;
+               regulator-name = "vdd_npu_s0";
+               regulator-boot-on;
+               regulator-enable-ramp-delay = <500>;
+               regulator-min-microvolt = <550000>;
+               regulator-max-microvolt = <950000>;
+               regulator-ramp-delay = <2300>;
+               vin-supply = <&vcc5v0_sys>;
+
+               regulator-state-mem {
+                       regulator-off-in-suspend;
+                };
+       };
+};
+
 &i2c6 {
        status = "okay";
 
@@ -392,6 +415,10 @@
        domain-supply = <&vdd_gpu_s0>;
 };
 
+&pd_npu {
+       domain-supply = <&vdd_npu_s0>;
+};
+
 &pinctrl {
        hym8563 {
                hym8563_int: hym8563-int {
@@ -424,6 +451,36 @@
        status = "okay";
 };
 
+&rknn_core_0 {
+       npu-supply = <&vdd_npu_s0>;
+       sram-supply = <&vdd_npu_s0>;
+       status = "okay";
+};
+
+&rknn_core_1 {
+       npu-supply = <&vdd_npu_s0>;
+       sram-supply = <&vdd_npu_s0>;
+       status = "okay";
+};
+
+&rknn_core_2 {
+       npu-supply = <&vdd_npu_s0>;
+       sram-supply = <&vdd_npu_s0>;
+       status = "okay";
+};
+
+&rknn_mmu_0 {
+       status = "okay";
+};
+
+&rknn_mmu_1 {
+       status = "okay";
+};
+
+&rknn_mmu_2 {
+       status = "okay";
+};
+
 &saradc {
        vref-supply = <&avcc_1v8_s0>;
        status = "okay";