#define ST_ACCEL_3_IG1_EN_MASK                 0x08
 #define ST_ACCEL_3_MULTIREAD_BIT               false
 
+/* CUSTOM VALUES FOR SENSOR 4 */
+#define ST_ACCEL_4_WAI_EXP                     0x3a
+#define ST_ACCEL_4_ODR_ADDR                    0x20
+#define ST_ACCEL_4_ODR_MASK                    0x30 /* DF1 and DF0 */
+#define ST_ACCEL_4_ODR_AVL_40HZ_VAL            0x00
+#define ST_ACCEL_4_ODR_AVL_160HZ_VAL           0x01
+#define ST_ACCEL_4_ODR_AVL_640HZ_VAL           0x02
+#define ST_ACCEL_4_ODR_AVL_2560HZ_VAL          0x03
+#define ST_ACCEL_4_PW_ADDR                     0x20
+#define ST_ACCEL_4_PW_MASK                     0xc0
+#define ST_ACCEL_4_FS_ADDR                     0x21
+#define ST_ACCEL_4_FS_MASK                     0x80
+#define ST_ACCEL_4_FS_AVL_2_VAL                        0X00
+#define ST_ACCEL_4_FS_AVL_6_VAL                        0X01
+#define ST_ACCEL_4_FS_AVL_2_GAIN               IIO_G_TO_M_S_2(1024)
+#define ST_ACCEL_4_FS_AVL_6_GAIN               IIO_G_TO_M_S_2(340)
+#define ST_ACCEL_4_BDU_ADDR                    0x21
+#define ST_ACCEL_4_BDU_MASK                    0x40
+#define ST_ACCEL_4_DRDY_IRQ_ADDR               0x21
+#define ST_ACCEL_4_DRDY_IRQ_INT1_MASK          0x04
+#define ST_ACCEL_4_IG1_EN_ADDR                 0x21
+#define ST_ACCEL_4_IG1_EN_MASK                 0x08
+#define ST_ACCEL_4_MULTIREAD_BIT               true
+
 static const struct iio_chan_spec st_accel_12bit_channels[] = {
        ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
                        BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
                .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
                .bootime = 2,
        },
+       {
+               .wai = ST_ACCEL_4_WAI_EXP,
+               .sensors_supported = {
+                       [0] = LIS3LV02DL_ACCEL_DEV_NAME,
+               },
+               .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
+               .odr = {
+                       .addr = ST_ACCEL_4_ODR_ADDR,
+                       .mask = ST_ACCEL_4_ODR_MASK,
+                       .odr_avl = {
+                               { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
+                               { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
+                               { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
+                               { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
+                       },
+               },
+               .pw = {
+                       .addr = ST_ACCEL_4_PW_ADDR,
+                       .mask = ST_ACCEL_4_PW_MASK,
+                       .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
+                       .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
+               },
+               .enable_axis = {
+                       .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
+                       .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
+               },
+               .fs = {
+                       .addr = ST_ACCEL_4_FS_ADDR,
+                       .mask = ST_ACCEL_4_FS_MASK,
+                       .fs_avl = {
+                               [0] = {
+                                       .num = ST_ACCEL_FS_AVL_2G,
+                                       .value = ST_ACCEL_4_FS_AVL_2_VAL,
+                                       .gain = ST_ACCEL_4_FS_AVL_2_GAIN,
+                               },
+                               [1] = {
+                                       .num = ST_ACCEL_FS_AVL_6G,
+                                       .value = ST_ACCEL_4_FS_AVL_6_VAL,
+                                       .gain = ST_ACCEL_4_FS_AVL_6_GAIN,
+                               },
+                       },
+               },
+               .bdu = {
+                       .addr = ST_ACCEL_4_BDU_ADDR,
+                       .mask = ST_ACCEL_4_BDU_MASK,
+               },
+               .drdy_irq = {
+                       .addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
+                       .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
+                       .ig1 = {
+                               .en_addr = ST_ACCEL_4_IG1_EN_ADDR,
+                               .en_mask = ST_ACCEL_4_IG1_EN_MASK,
+                       },
+               },
+               .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
+               .bootime = 2, /* guess */
+       },
 };
 
 static int st_accel_read_raw(struct iio_dev *indio_dev,