board_pchlan,
        board_pch2lan,
        board_pch_lpt,
-       board_pch_spt
+       board_pch_spt,
+       board_pch_cnp
 };
 
 struct e1000_ps_page {
 extern const struct e1000_info e1000_pch2_info;
 extern const struct e1000_info e1000_pch_lpt_info;
 extern const struct e1000_info e1000_pch_spt_info;
+extern const struct e1000_info e1000_pch_cnp_info;
 extern const struct e1000_info e1000_es2_info;
 
 void e1000e_ptp_init(struct e1000_adapter *adapter);
 
 #define E1000_DEV_ID_PCH_SPT_I219_V4           0x15D8
 #define E1000_DEV_ID_PCH_SPT_I219_LM5          0x15E3
 #define E1000_DEV_ID_PCH_SPT_I219_V5           0x15D6
+#define E1000_DEV_ID_PCH_CNP_I219_LM6          0x15BD
+#define E1000_DEV_ID_PCH_CNP_I219_V6           0x15BE
+#define E1000_DEV_ID_PCH_CNP_I219_LM7          0x15BB
+#define E1000_DEV_ID_PCH_CNP_I219_V7           0x15BC
 
 #define E1000_REVISION_4       4
 
        e1000_pch2lan,
        e1000_pch_lpt,
        e1000_pch_spt,
+       e1000_pch_cnp,
 };
 
 enum e1000_media_type {
 
        .phy_ops                = &ich8_phy_ops,
        .nvm_ops                = &spt_nvm_ops,
 };
+
+const struct e1000_info e1000_pch_cnp_info = {
+       .mac                    = e1000_pch_cnp,
+       .flags                  = FLAG_IS_ICH
+                                 | FLAG_HAS_WOL
+                                 | FLAG_HAS_HW_TIMESTAMP
+                                 | FLAG_HAS_CTRLEXT_ON_LOAD
+                                 | FLAG_HAS_AMT
+                                 | FLAG_HAS_FLASH
+                                 | FLAG_HAS_JUMBO_FRAMES
+                                 | FLAG_APME_IN_WUC,
+       .flags2                 = FLAG2_HAS_PHY_STATS
+                                 | FLAG2_HAS_EEE,
+       .pba                    = 26,
+       .max_hw_frame_size      = 9022,
+       .get_variants           = e1000_get_variants_ich8lan,
+       .mac_ops                = &ich8_mac_ops,
+       .phy_ops                = &ich8_phy_ops,
+       .nvm_ops                = &spt_nvm_ops,
+};
 
        [board_pch2lan]         = &e1000_pch2_info,
        [board_pch_lpt]         = &e1000_pch_lpt_info,
        [board_pch_spt]         = &e1000_pch_spt_info,
+       [board_pch_cnp]         = &e1000_pch_cnp_info,
 };
 
 struct e1000_reg_info {
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
 
        { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
 };