ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
        };
 
-       ssi_ssr_fck_3430es1: ssi_ssr_fck_3430es1 {
+       ssi_ssr_fck: ssi_ssr_fck_3430es1 {
                #clock-cells = <0>;
                compatible = "ti,composite-clock";
                clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>;
        };
 
-       ssi_sst_fck_3430es1: ssi_sst_fck_3430es1 {
+       ssi_sst_fck: ssi_sst_fck_3430es1 {
                #clock-cells = <0>;
                compatible = "fixed-factor-clock";
-               clocks = <&ssi_ssr_fck_3430es1>;
+               clocks = <&ssi_ssr_fck>;
                clock-mult = <1>;
                clock-div = <2>;
        };
                clock-div = <1>;
        };
 
-       ssi_ick_3430es1: ssi_ick_3430es1 {
+       ssi_ick: ssi_ick_3430es1 {
                #clock-cells = <0>;
                compatible = "ti,omap3-no-wait-interface-clock";
                clocks = <&ssi_l4_ick>;
                         <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
                         <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
                         <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
-                        <&fshostusb_fck>, <&fac_ick>, <&ssi_ick_3430es1>;
+                        <&fshostusb_fck>, <&fac_ick>, <&ssi_ick>;
        };
 };
 
                ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
        };
 
-       ssi_ssr_fck_3430es2: ssi_ssr_fck_3430es2 {
+       ssi_ssr_fck: ssi_ssr_fck_3430es2 {
                #clock-cells = <0>;
                compatible = "ti,composite-clock";
                clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;
        };
 
-       ssi_sst_fck_3430es2: ssi_sst_fck_3430es2 {
+       ssi_sst_fck: ssi_sst_fck_3430es2 {
                #clock-cells = <0>;
                compatible = "fixed-factor-clock";
-               clocks = <&ssi_ssr_fck_3430es2>;
+               clocks = <&ssi_ssr_fck>;
                clock-mult = <1>;
                clock-div = <2>;
        };
                clock-div = <1>;
        };
 
-       ssi_ick_3430es2: ssi_ick_3430es2 {
+       ssi_ick: ssi_ick_3430es2 {
                #clock-cells = <0>;
                compatible = "ti,omap3-ssi-interface-clock";
                clocks = <&ssi_l4_ick>;
                         <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
                         <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
                         <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
-                        <&ssi_ick_3430es2>;
+                        <&ssi_ick>;
        };
 };