#define IMX_MU_SCU_CHANS       6
 /* TX0/RX0 */
 #define IMX_MU_S4_CHANS                2
-#define IMX_MU_CHAN_NAME_SIZE  20
+#define IMX_MU_CHAN_NAME_SIZE  32
 
 #define IMX_MU_V2_PAR_OFF      0x4
 #define IMX_MU_V2_TR_MASK      GENMASK(7, 0)
                cp->chan = &priv->mbox_chans[i];
                priv->mbox_chans[i].con_priv = cp;
                snprintf(cp->irq_desc, sizeof(cp->irq_desc),
-                        "imx_mu_chan[%i-%i]", cp->type, cp->idx);
+                        "%s[%i-%i]", dev_name(priv->dev), cp->type, cp->idx);
        }
 
        priv->mbox.num_chans = IMX_MU_CHANS;
                cp->chan = &priv->mbox_chans[i];
                priv->mbox_chans[i].con_priv = cp;
                snprintf(cp->irq_desc, sizeof(cp->irq_desc),
-                        "imx_mu_chan[%i-%i]", cp->type, cp->idx);
+                        "%s[%i-%i]", dev_name(priv->dev), cp->type, cp->idx);
        }
 
        priv->mbox.num_chans = num_chans;