if (r->rid == RDT_RESOURCE_L3 ||
                    r->rid == RDT_RESOURCE_L2) {
-                       r->cache.arch_has_sparse_bitmaps = false;
+                       r->cache.arch_has_sparse_bitmasks = false;
                        r->cache.arch_has_per_cpu_cfg = false;
                        r->cache.min_cbm_bits = 1;
                } else if (r->rid == RDT_RESOURCE_MBA) {
 
                if (r->rid == RDT_RESOURCE_L3 ||
                    r->rid == RDT_RESOURCE_L2) {
-                       r->cache.arch_has_sparse_bitmaps = true;
+                       r->cache.arch_has_sparse_bitmasks = true;
                        r->cache.arch_has_per_cpu_cfg = true;
                        r->cache.min_cbm_bits = 0;
                } else if (r->rid == RDT_RESOURCE_MBA) {
 
        first_bit = find_first_bit(&val, cbm_len);
        zero_bit = find_next_zero_bit(&val, cbm_len, first_bit);
 
-       /* Are non-contiguous bitmaps allowed? */
-       if (!r->cache.arch_has_sparse_bitmaps &&
+       /* Are non-contiguous bitmasks allowed? */
+       if (!r->cache.arch_has_sparse_bitmasks &&
            (find_next_bit(&val, cbm_len, zero_bit) < cbm_len)) {
                rdt_last_cmd_printf("The mask %lx has non-consecutive 1-bits\n", val);
                return false;
 
  *                     zero CBM.
  * @shareable_bits:    Bitmask of shareable resource with other
  *                     executing entities
- * @arch_has_sparse_bitmaps:   True if a bitmap like f00f is valid.
+ * @arch_has_sparse_bitmasks:  True if a bitmask like f00f is valid.
  * @arch_has_per_cpu_cfg:      True if QOS_CFG register for this cache
  *                             level has CPU scope.
  */
        unsigned int    cbm_len;
        unsigned int    min_cbm_bits;
        unsigned int    shareable_bits;
-       bool            arch_has_sparse_bitmaps;
+       bool            arch_has_sparse_bitmasks;
        bool            arch_has_per_cpu_cfg;
 };