PCI: microchip: Move PLDA functions to pcie-plda-host.c

Move plda_pcie_setup_window() and plda_pcie_setup_iomems() to
pcie-plda-host.c so they can be shared by all PLDA-based drivers.

Link: https://lore.kernel.org/linux-pci/20240328091835.14797-10-minda.chen@starfivetech.com
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 2303606f0f15d1615a2cf843a22a130dcf740806..c738075f9c2608e46958c1bccede26e455e53208 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17224,6 +17224,7 @@ M:      Daire McNamara <daire.mcnamara@microchip.com>
 L:     linux-pci@vger.kernel.org
 S:     Maintained
 F:     Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml
+F:     drivers/pci/controller/plda/pcie-plda-host.c
 F:     drivers/pci/controller/plda/pcie-plda.h
 
 PCI DRIVER FOR RENESAS R-CAR

diff --git a/drivers/pci/controller/plda/Kconfig b/drivers/pci/controller/plda/Kconfig
index 5cb3be4fc98ccc259b877ea2b7a88a40d5f272f0..e54a82ee94f5975e748114e30302a1741ea17b8c 100644 (file)
--- a/drivers/pci/controller/plda/Kconfig
+++ b/drivers/pci/controller/plda/Kconfig
@@ -3,10 +3,14 @@
 menu "PLDA-based PCIe controllers"
        depends on PCI
 
+config PCIE_PLDA_HOST
+       bool
+
 config PCIE_MICROCHIP_HOST
        tristate "Microchip AXI PCIe controller"
        depends on PCI_MSI && OF
        select PCI_HOST_COMMON
+       select PCIE_PLDA_HOST
        help
          Say Y here if you want kernel to support the Microchip AXI PCIe
          Host Bridge driver.

diff --git a/drivers/pci/controller/plda/Makefile b/drivers/pci/controller/plda/Makefile
index e1a265cbf91c2d43cdf01d5b70576e2599eace6a..4340ab007f4409b6a2e0e8fb41a7535d00fe03af 100644 (file)
--- a/drivers/pci/controller/plda/Makefile
+++ b/drivers/pci/controller/plda/Makefile
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_PCIE_PLDA_HOST) += pcie-plda-host.o
 obj-$(CONFIG_PCIE_MICROCHIP_HOST) += pcie-microchip-host.o

diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c
index 9b367927cd32a3e8c7e00218c510497498b5fa22..53c4c0f9bb54097c6b93400968d9ec1e30cd5fdb 100644 (file)
--- a/drivers/pci/controller/plda/pcie-microchip-host.c
+++ b/drivers/pci/controller/plda/pcie-microchip-host.c
@@ -838,66 +838,6 @@ static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port)
        return mc_allocate_msi_domains(port);
 }
 
-static void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
-                                  phys_addr_t axi_addr, phys_addr_t pci_addr,
-                                  size_t size)
-{
-       u32 atr_sz = ilog2(size) - 1;
-       u32 val;
-
-       if (index == 0)
-               val = PCIE_CONFIG_INTERFACE;
-       else
-               val = PCIE_TX_RX_INTERFACE;
-
-       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
-              ATR0_AXI4_SLV0_TRSL_PARAM);
-
-       val = lower_32_bits(axi_addr) | (atr_sz << ATR_SIZE_SHIFT) |
-                           ATR_IMPL_ENABLE;
-       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
-              ATR0_AXI4_SLV0_SRCADDR_PARAM);
-
-       val = upper_32_bits(axi_addr);
-       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
-              ATR0_AXI4_SLV0_SRC_ADDR);
-
-       val = lower_32_bits(pci_addr);
-       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
-              ATR0_AXI4_SLV0_TRSL_ADDR_LSB);
-
-       val = upper_32_bits(pci_addr);
-       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
-              ATR0_AXI4_SLV0_TRSL_ADDR_UDW);
-
-       val = readl(bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
-       val |= (ATR0_PCIE_ATR_SIZE << ATR0_PCIE_ATR_SIZE_SHIFT);
-       writel(val, bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
-       writel(0, bridge_base_addr + ATR0_PCIE_WIN0_SRC_ADDR);
-}
-
-static int plda_pcie_setup_iomems(struct platform_device *pdev,
-                                 struct plda_pcie_rp *port)
-{
-       void __iomem *bridge_base_addr = port->bridge_addr;
-       struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
-       struct resource_entry *entry;
-       u64 pci_addr;
-       u32 index = 1;
-
-       resource_list_for_each_entry(entry, &bridge->windows) {
-               if (resource_type(entry->res) == IORESOURCE_MEM) {
-                       pci_addr = entry->res->start - entry->offset;
-                       plda_pcie_setup_window(bridge_base_addr, index,
-                                              entry->res->start, pci_addr,
-                                              resource_size(entry->res));
-                       index++;
-               }
-       }
-
-       return 0;
-}
-
 static inline void mc_clear_secs(struct mc_pcie *port)
 {
        void __iomem *ctrl_base_addr = port->axi_base_addr + MC_PCIE_CTRL_ADDR;

diff --git a/drivers/pci/controller/plda/pcie-plda-host.c b/drivers/pci/controller/plda/pcie-plda-host.c
new file mode 100644 (file)
index 0000000..605e439
--- /dev/null
+++ b/drivers/pci/controller/plda/pcie-plda-host.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PLDA PCIe XpressRich host controller driver
+ *
+ * Copyright (C) 2023 Microchip Co. Ltd
+ *
+ * Author: Daire McNamara <daire.mcnamara@microchip.com>
+ */
+
+#include <linux/pci-ecam.h>
+
+#include "pcie-plda.h"
+
+void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
+                           phys_addr_t axi_addr, phys_addr_t pci_addr,
+                           size_t size)
+{
+       u32 atr_sz = ilog2(size) - 1;
+       u32 val;
+
+       if (index == 0)
+               val = PCIE_CONFIG_INTERFACE;
+       else
+               val = PCIE_TX_RX_INTERFACE;
+
+       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+              ATR0_AXI4_SLV0_TRSL_PARAM);
+
+       val = lower_32_bits(axi_addr) | (atr_sz << ATR_SIZE_SHIFT) |
+                           ATR_IMPL_ENABLE;
+       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+              ATR0_AXI4_SLV0_SRCADDR_PARAM);
+
+       val = upper_32_bits(axi_addr);
+       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+              ATR0_AXI4_SLV0_SRC_ADDR);
+
+       val = lower_32_bits(pci_addr);
+       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+              ATR0_AXI4_SLV0_TRSL_ADDR_LSB);
+
+       val = upper_32_bits(pci_addr);
+       writel(val, bridge_base_addr + (index * ATR_ENTRY_SIZE) +
+              ATR0_AXI4_SLV0_TRSL_ADDR_UDW);
+
+       val = readl(bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
+       val |= (ATR0_PCIE_ATR_SIZE << ATR0_PCIE_ATR_SIZE_SHIFT);
+       writel(val, bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
+       writel(0, bridge_base_addr + ATR0_PCIE_WIN0_SRC_ADDR);
+}
+EXPORT_SYMBOL_GPL(plda_pcie_setup_window);
+
+int plda_pcie_setup_iomems(struct platform_device *pdev,
+                          struct plda_pcie_rp *port)
+{
+       void __iomem *bridge_base_addr = port->bridge_addr;
+       struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
+       struct resource_entry *entry;
+       u64 pci_addr;
+       u32 index = 1;
+
+       resource_list_for_each_entry(entry, &bridge->windows) {
+               if (resource_type(entry->res) == IORESOURCE_MEM) {
+                       pci_addr = entry->res->start - entry->offset;
+                       plda_pcie_setup_window(bridge_base_addr, index,
+                                              entry->res->start, pci_addr,
+                                              resource_size(entry->res));
+                       index++;
+               }
+       }
+
+       return 0;
+}
+EXPORT_SYMBOL_GPL(plda_pcie_setup_iomems);

diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h
index 9ca66916c6091d0e5b1a3dd4705f90de8af1342c..e4c51b3d0c13041297f95cf0bbe5f923243017e6 100644 (file)
--- a/drivers/pci/controller/plda/pcie-plda.h
+++ b/drivers/pci/controller/plda/pcie-plda.h
@@ -126,4 +126,9 @@ struct plda_pcie_rp {
        void __iomem *bridge_addr;
 };
 
+void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
+                           phys_addr_t axi_addr, phys_addr_t pci_addr,
+                           size_t size);
+int plda_pcie_setup_iomems(struct platform_device *pdev,
+                          struct plda_pcie_rp *port);
 #endif