ARM: l2c: realview: improve commentry about the L2 cache requirements

Add better commentry about the L2 cache requirements on these platforms.
Unfortunately, the auxiliary control register is not pre-set to indicate
the correct cache parameters, so we have to manually program these.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index c85ddb2a0ad09083e3e3c30901bc28bb3c807af2..b575895037b8f7f887c5962d43df84b1cc5da8d9 100644 (file)
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -442,8 +442,13 @@ static void __init realview_eb_init(void)
                realview_eb11mp_fixup();
 
 #ifdef CONFIG_CACHE_L2X0
-               /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
-                * Bits:  .... ...0 0111 1001 0000 .... .... .... */
+               /*
+                * The PL220 needs to be manually configured as the hardware
+                * doesn't report the correct sizes.
+                * 1MB (128KB/way), 8-way associativity, event monitor and
+                * parity enabled, ignore share bit, no force write allocate
+                * Bits:  .... ...0 0111 1001 0000 .... .... ....
+                */
                l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
 #endif
                platform_device_register(&pmu_device);

diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index c5eade76461be3cf2faa4d6dffbb9becc7cbb872..e3bddb5ab10fba8b25b1033dedd8203b6707043b 100644 (file)
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -355,7 +355,13 @@ static void __init realview_pb1176_init(void)
        int i;
 
 #ifdef CONFIG_CACHE_L2X0
-       /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
+       /*
+        * The PL220 needs to be manually configured as the hardware
+        * doesn't report the correct sizes.
+        * 128kB (16kB/way), 8-way associativity, event monitor and
+        * parity enabled, ignore share bit, no force write allocate
+        * Bits:  .... ...0 0111 0011 0000 .... .... ....
+        */
        l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
 #endif
 

diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index f4b0962578feb94dd653033620bfed0fcfddeaac..101deaf2630bd155e2ac1f747ab51c154d034aef 100644 (file)
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -337,8 +337,13 @@ static void __init realview_pb11mp_init(void)
        int i;
 
 #ifdef CONFIG_CACHE_L2X0
-       /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
-        * Bits:  .... ...0 0111 1001 0000 .... .... .... */
+       /*
+        * The PL220 needs to be manually configured as the hardware
+        * doesn't report the correct sizes.
+        * 1MB (128KB/way), 8-way associativity, event monitor and
+        * parity enabled, ignore share bit, no force write allocate
+        * Bits:  .... ...0 0111 1001 0000 .... .... ....
+        */
        l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
 #endif