WREG32(reg, doorbell_range);
 }
 
+static void nbio_v7_4_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
+                                        int doorbell_index)
+{
+       u32 reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);
+
+       u32 doorbell_range = RREG32(reg);
+
+       if (use_doorbell) {
+               doorbell_range = REG_SET_FIELD(doorbell_range,
+                                              BIF_MMSCH0_DOORBELL_RANGE, OFFSET,
+                                              doorbell_index);
+               doorbell_range = REG_SET_FIELD(doorbell_range,
+                                              BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8);
+       } else
+               doorbell_range = REG_SET_FIELD(doorbell_range,
+                                              BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0);
+
+       WREG32(reg, doorbell_range);
+}
+
 static void nbio_v7_4_enable_doorbell_aperture(struct amdgpu_device *adev,
                                               bool enable)
 {
        .hdp_flush = nbio_v7_4_hdp_flush,
        .get_memsize = nbio_v7_4_get_memsize,
        .sdma_doorbell_range = nbio_v7_4_sdma_doorbell_range,
+       .vcn_doorbell_range = nbio_v7_4_vcn_doorbell_range,
        .enable_doorbell_aperture = nbio_v7_4_enable_doorbell_aperture,
        .enable_doorbell_selfring_aperture = nbio_v7_4_enable_doorbell_selfring_aperture,
        .ih_doorbell_range = nbio_v7_4_ih_doorbell_range,