tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
                                IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
        am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
+       adc_dev->buffer_en_ch_steps = 0;
 
        /* Flush FIFO of leftover data in the time it takes to disable adc */
        fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
        tiadc_writel(adc_dev, REG_CTRL, restore);
 
        tiadc_step_config(indio_dev);
+       am335x_tsc_se_set(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
 
        return 0;
 }
 
 
        if (tscadc_dev->tsc_cell != -1)
                tscadc_idle_config(tscadc_dev);
-       am335x_tsc_se_update(tscadc_dev);
        restore = tscadc_readl(tscadc_dev, REG_CTRL);
        tscadc_writel(tscadc_dev, REG_CTRL,
                        (restore | CNTRLREG_TSCSSENB));