dt-bindings: mtd: update mtd-physmap.yaml reference

Changeset 63f8e9e0ac65 ("dt-bindings: mtd: Convert mtd-physmap to DT schema")
renamed: Documentation/devicetree/bindings/mtd/mtd-physmap.txt
to: Documentation/devicetree/bindings/mtd/mtd-physmap.yaml.

Update its cross-reference accordingly.

Fixes: 63f8e9e0ac65 ("dt-bindings: mtd: Convert mtd-physmap to DT schema")
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/ab2ff9ee66110c37691b467ec8b4679e9d426416.1626947923.git.mchehab+huawei@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>

diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nor.txt b/Documentation/devicetree/bindings/mtd/gpmc-nor.txt
index c8567b40fe13a02abaee0ffd2f037d0a4282a950..2133be0d52f2444a642eb03337dc9ff7a1e993e7 100644 (file)
--- a/Documentation/devicetree/bindings/mtd/gpmc-nor.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nor.txt
@@ -10,7 +10,7 @@ Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
 Required properties:
 - bank-width:          Width of NOR flash in bytes. GPMC supports 8-bit and
                        16-bit devices and so must be either 1 or 2 bytes.
-- compatible:          Documentation/devicetree/bindings/mtd/mtd-physmap.txt
+- compatible:          Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
 - gpmc,cs-on-ns:               Chip-select assertion time
 - gpmc,cs-rd-off-ns:   Chip-select de-assertion time for reads
 - gpmc,cs-wr-off-ns:   Chip-select de-assertion time for writes
@@ -21,7 +21,7 @@ Required properties:
 - gpmc,access-ns:      Start cycle to first data capture (read access)
 - gpmc,rd-cycle-ns:    Total read cycle time
 - gpmc,wr-cycle-ns:    Total write cycle time
-- linux,mtd-name:      Documentation/devicetree/bindings/mtd/mtd-physmap.txt
+- linux,mtd-name:      Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
 - reg:                 Chip-select, base address (relative to chip-select)
                        and size of NOR flash. Note that base address will be
                        typically 0 as this is the start of the chip-select.