ARM64: dts: meson-gx: fix UART pclk clock name

The clock-names for pclk was wrongly set to "core", but the bindings
specifies "pclk".
This was not cathed until the legacy non-documented bindings were removed.

Reported-by: Andreas Färber <afaerber@suse.de>
Fixes: f72d6f6037b7 ("ARM64: dts: meson-gx: use stable UART bindings with correct gate clock")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index ead895a4e9a5c9fb6f663092288e8178b95cd6a1..1fb8b9d6cb4ea07c105d088d2ccc5c25ca1ea128 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -753,12 +753,12 @@
 
 &uart_B {
        clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &uart_C {
        clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &vpu {

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index 8ed981f59e5ae5804da97c887193a32a73b53983..6524b89e7115b5e313834b5ab8565768eb06bd13 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -688,7 +688,7 @@
 
 &uart_A {
        clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &uart_AO {
@@ -703,12 +703,12 @@
 
 &uart_B {
        clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &uart_C {
        clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
-       clock-names = "xtal", "core", "baud";
+       clock-names = "xtal", "pclk", "baud";
 };
 
 &vpu {