struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
        uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man;
        int panel_pwr_delay = 2000;
+       bool is_mac = false;
        DRM_DEBUG("\n");
 
        if (radeon_encoder->enc_priv) {
                }
        }
 
+       /* macs (and possibly some x86 oem systems?) wire up LVDS strangely
+        * Taken from radeonfb.
+        */
+       if ((rdev->mode_info.connector_table == CT_IBOOK) ||
+           (rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) ||
+           (rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) ||
+           (rdev->mode_info.connector_table == CT_POWERBOOK_VGA))
+               is_mac = true;
+
        switch (mode) {
        case DRM_MODE_DPMS_ON:
                disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN);
 
                lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
                lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON);
+               if (is_mac)
+                       lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
                lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
                udelay(panel_pwr_delay * 1000);
                WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
                WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
                lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
                lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
-               lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
+               if (is_mac) {
+                       lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN;
+                       WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
+                       lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN);
+               } else {
+                       WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
+                       lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
+               }
                udelay(panel_pwr_delay * 1000);
                WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
                WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);