select HAVE_S3C2410_WATCHDOG if WATCHDOG
        select HAVE_S3C_RTC if RTC_CLASS
        select NEED_MACH_GPIO_H
 +      select SAMSUNG_WDT_RESET
+       select SAMSUNG_ATAGS
        help
          Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
          SMDK6450.
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
        select HAVE_S3C_RTC if RTC_CLASS
        select NEED_MACH_GPIO_H
 +      select SAMSUNG_WDT_RESET
+       select SAMSUNG_ATAGS
        help
          Samsung S5PC100 series based systems
  
 
  machine-$(CONFIG_ARCH_OMAP2PLUS)      += omap2
  machine-$(CONFIG_ARCH_ORION5X)                += orion5x
  machine-$(CONFIG_ARCH_PICOXCELL)      += picoxcell
 -machine-$(CONFIG_ARCH_PRIMA2)         += prima2
 +machine-$(CONFIG_ARCH_SIRF)           += prima2
  machine-$(CONFIG_ARCH_PXA)            += pxa
  machine-$(CONFIG_ARCH_REALVIEW)               += realview
+ machine-$(CONFIG_ARCH_ROCKCHIP)               += rockchip
  machine-$(CONFIG_ARCH_RPC)            += rpc
  machine-$(CONFIG_ARCH_S3C24XX)                += s3c24xx
  machine-$(CONFIG_ARCH_S3C64XX)                += s3c64xx
 
  # endif
  #endif
  
 +#ifdef CONFIG_CPU_PJ4B
 +# ifdef CPU_NAME
 +#  undef  MULTI_CPU
 +#  define MULTI_CPU
 +# else
 +#  define CPU_NAME cpu_pj4b
 +# endif
 +#endif
 +
+ #ifdef CONFIG_CPU_V7M
+ # ifdef CPU_NAME
+ #  undef  MULTI_CPU
+ #  define MULTI_CPU
+ # else
+ #  define CPU_NAME cpu_v7m
+ # endif
+ #endif
+ 
  #ifndef MULTI_CPU
  #define cpu_proc_init                 __glue(CPU_NAME,_proc_init)
  #define cpu_proc_fin                  __glue(CPU_NAME,_proc_fin)
 
              "I" (offsetof(struct stack, und[0])),
              PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
            : "r14");
+ #endif
  }
  
 -int __cpu_logical_map[NR_CPUS];
 +u32 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
  
  void __init smp_setup_processor_id(void)
  {
 
  };
  
  static struct omap_hwmod_rst_info am33xx_gfx_resets[] = {
-       { .name = "gfx", .rst_shift = 0 },
+       { .name = "gfx", .rst_shift = 0, .st_shift = 0},
  };
  
 -static struct omap_hwmod_irq_info am33xx_gfx_irqs[] = {
 -      { .name = "gfxint", .irq = 37 + OMAP_INTC_START, },
 -      { .irq = -1 },
 -};
 -
  static struct omap_hwmod am33xx_gfx_hwmod = {
        .name           = "gfx",
        .class          = &am33xx_gfx_hwmod_class,
 
   * All enquiries to support@picochip.com
   */
  #include <linux/delay.h>
 -#include <linux/irq.h>
 -#include <linux/irqchip.h>
 -#include <linux/irqdomain.h>
  #include <linux/of.h>
  #include <linux/of_address.h>
 -#include <linux/of_irq.h>
  #include <linux/of_platform.h>
- #include <linux/dw_apb_timer.h>
  
  #include <asm/mach/arch.h>
  #include <asm/mach/map.h>
  
  DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
        .map_io         = picoxcell_map_io,
-       .init_time      = dw_apb_timer_init,
 -      .nr_irqs        = NR_IRQS_LEGACY,
 -      .init_irq       = irqchip_init,
        .init_machine   = picoxcell_init_machine,
        .dt_compat      = picoxcell_dt_match,
        .restart        = picoxcell_wdt_restart,
 
  DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
        .dt_compat      = v2m_dt_match,
        .smp            = smp_ops(vexpress_smp_ops),
+       .smp_init       = smp_init_ops(vexpress_smp_init_ops),
        .map_io         = v2m_dt_map_io,
        .init_early     = v2m_dt_init_early,
 -      .init_irq       = irqchip_init,
        .init_time      = v2m_dt_timer_init,
        .init_machine   = v2m_dt_init,
  MACHINE_END
 
        NULL
  };
  
- extern struct smp_operations virt_smp_ops;
- 
  DT_MACHINE_START(VIRT, "Dummy Virtual Machine")
 -      .init_irq       = irqchip_init,
        .init_machine   = virt_init,
-       .smp            = smp_ops(virt_smp_ops),
        .dt_compat      = virt_dt_match,
  MACHINE_END
 
  obj-$(CONFIG_SAMSUNG_PM_CHECK)        += pm-check.o
  
  obj-$(CONFIG_SAMSUNG_WAKEMASK)        += wakeup-mask.o
 +obj-$(CONFIG_SAMSUNG_WDT_RESET)       += watchdog-reset.o
  
- obj-$(CONFIG_S5P_PM)          += s5p-pm.o s5p-irq-pm.o
+ obj-$(CONFIG_S5P_PM)          += s5p-pm.o
+ obj-$(CONFIG_S5P_IRQ_PM)      += s5p-irq-pm.o
  obj-$(CONFIG_S5P_SLEEP)               += s5p-sleep.o
 
                port->mapbase = res->start;
                port->irq = res2->start;
                port->dev = &pdev->dev;
-               port->uartclk = clk_get_rate(clk);
-               port->private_data = clk;
+               port->uartclk = clk_get_rate(xuartps_data->refclk);
+               port->private_data = xuartps_data;
 -              dev_set_drvdata(&pdev->dev, port);
 +              platform_set_drvdata(pdev, port);
                rc = uart_add_one_port(&xuartps_uart_driver, port);
                if (rc) {
                        dev_err(&pdev->dev,
                                "uart_add_one_port() failed; err=%i\n", rc);
-                       return rc;
 -                      dev_set_drvdata(&pdev->dev, NULL);
+                       goto err_out_clk_disable;
                }
                return 0;
        }
   **/
  static int xuartps_remove(struct platform_device *pdev)
  {
 -      struct uart_port *port = dev_get_drvdata(&pdev->dev);
 +      struct uart_port *port = platform_get_drvdata(pdev);
-       struct clk *clk = port->private_data;
+       struct xuartps *xuartps_data = port->private_data;
        int rc;
  
        /* Remove the xuartps port from the serial core */
        rc = uart_remove_one_port(&xuartps_uart_driver, port);
 -      dev_set_drvdata(&pdev->dev, NULL);
        port->mapbase = 0;
-       clk_disable_unprepare(clk);
+       clk_disable_unprepare(xuartps_data->refclk);
+       clk_disable_unprepare(xuartps_data->aperclk);
+       clk_put(xuartps_data->refclk);
+       clk_put(xuartps_data->aperclk);
+       kfree(xuartps_data);
        return rc;
  }