Move ONE_REG AltiVec support to powerpc generic layer.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
 
 /* FP and vector status/control registers */
 #define KVM_REG_PPC_FPSCR      (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x80)
+/*
+ * VSCR register is documented as a 32-bit register in the ISA, but it can
+ * only be accesses via a vector register. Expose VSCR as a 32-bit register
+ * even though the kernel represents it as a 128-bit vector.
+ */
 #define KVM_REG_PPC_VSCR       (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x81)
 
 /* Virtual processor areas */
 
                case KVM_REG_PPC_FPSCR:
                        *val = get_reg_val(id, vcpu->arch.fp.fpscr);
                        break;
-#ifdef CONFIG_ALTIVEC
-               case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
-                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
-                               r = -ENXIO;
-                               break;
-                       }
-                       val->vval = vcpu->arch.vr.vr[id - KVM_REG_PPC_VR0];
-                       break;
-               case KVM_REG_PPC_VSCR:
-                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
-                               r = -ENXIO;
-                               break;
-                       }
-                       *val = get_reg_val(id, vcpu->arch.vr.vscr.u[3]);
-                       break;
-               case KVM_REG_PPC_VRSAVE:
-                       *val = get_reg_val(id, vcpu->arch.vrsave);
-                       break;
-#endif /* CONFIG_ALTIVEC */
 #ifdef CONFIG_VSX
                case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
                        if (cpu_has_feature(CPU_FTR_VSX)) {
                case KVM_REG_PPC_FPSCR:
                        vcpu->arch.fp.fpscr = set_reg_val(id, *val);
                        break;
-#ifdef CONFIG_ALTIVEC
-               case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
-                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
-                               r = -ENXIO;
-                               break;
-                       }
-                       vcpu->arch.vr.vr[id - KVM_REG_PPC_VR0] = val->vval;
-                       break;
-               case KVM_REG_PPC_VSCR:
-                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
-                               r = -ENXIO;
-                               break;
-                       }
-                       vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
-                       break;
-               case KVM_REG_PPC_VRSAVE:
-                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
-                               r = -ENXIO;
-                               break;
-                       }
-                       vcpu->arch.vrsave = set_reg_val(id, *val);
-                       break;
-#endif /* CONFIG_ALTIVEC */
 #ifdef CONFIG_VSX
                case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
                        if (cpu_has_feature(CPU_FTR_VSX)) {
 
        if (r == -EINVAL) {
                r = 0;
                switch (reg->id) {
+#ifdef CONFIG_ALTIVEC
+               case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
+                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                               r = -ENXIO;
+                               break;
+                       }
+                       vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
+                       break;
+               case KVM_REG_PPC_VSCR:
+                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                               r = -ENXIO;
+                               break;
+                       }
+                       vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val);
+                       break;
+               case KVM_REG_PPC_VRSAVE:
+                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                               r = -ENXIO;
+                               break;
+                       }
+                       vcpu->arch.vrsave = set_reg_val(reg->id, val);
+                       break;
+#endif /* CONFIG_ALTIVEC */
                default:
                        r = -EINVAL;
                        break;
        if (r == -EINVAL) {
                r = 0;
                switch (reg->id) {
+#ifdef CONFIG_ALTIVEC
+               case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
+                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                               r = -ENXIO;
+                               break;
+                       }
+                       val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0];
+                       break;
+               case KVM_REG_PPC_VSCR:
+                       if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                               r = -ENXIO;
+                               break;
+                       }
+                       val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]);
+                       break;
+               case KVM_REG_PPC_VRSAVE:
+                       val = get_reg_val(reg->id, vcpu->arch.vrsave);
+                       break;
+#endif /* CONFIG_ALTIVEC */
                default:
                        r = -EINVAL;
                        break;