~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
                  I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
                  I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
-                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT |
-                 I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
+                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT);
        I915_WRITE16(IMR, dev_priv->irq_mask);
 
        I915_WRITE16(IER,
                     I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
                     I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
-                    I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT |
                     I915_USER_INTERRUPT);
        POSTING_READ16(IER);
 
                  I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
                  I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
                  I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
-                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT |
-                 I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
+                 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT);
 
        enable_mask =
                I915_ASLE_INTERRUPT |
                I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
                I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
-               I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT |
                I915_USER_INTERRUPT;
 
        if (I915_HAS_HOTPLUG(dev)) {