PCI: Clean up __pci_find_next_cap_ttl() readability

Refactor the __pci_find_next_cap_ttl() to improve code clarity:

  - Replace magic number 0x40 with PCI_STD_HEADER_SIZEOF.
  - Use ALIGN_DOWN() for position alignment instead of manual bitmask.
  - Extract PCI capability fields via FIELD_GET() with standardized masks.
  - Add necessary headers (linux/align.h).

No functional changes intended.

Signed-off-by: Hans Zhang <18255117159@163.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Niklas Schnelle <schnelle@linux.ibm.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20250813144529.303548-2-18255117159@163.com

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b0f4d98036cddddd88e2011da09aa6719b738651..40a5c87d9a6b6d35b677135dcf82e6744eaefd60 100644 (file)
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -9,6 +9,7 @@
  */
 
 #include <linux/acpi.h>
+#include <linux/align.h>
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/dmi.h>
@@ -432,17 +433,17 @@ static u8 __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn,
        pci_bus_read_config_byte(bus, devfn, pos, &pos);
 
        while ((*ttl)--) {
-               if (pos < 0x40)
+               if (pos < PCI_STD_HEADER_SIZEOF)
                        break;
-               pos &= ~3;
+               pos = ALIGN_DOWN(pos, 4);
                pci_bus_read_config_word(bus, devfn, pos, &ent);
 
-               id = ent & 0xff;
+               id = FIELD_GET(PCI_CAP_ID_MASK, ent);
                if (id == 0xff)
                        break;
                if (id == cap)
                        return pos;
-               pos = (ent >> 8);
+               pos = FIELD_GET(PCI_CAP_LIST_NEXT_MASK, ent);
        }
        return 0;
 }

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index f5b17745de607d92ad6a2db3383bfcb7d911ad0e..1bba99b46227e826de073e1beb520905528b6279 100644 (file)
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -207,6 +207,9 @@
 
 /* Capability lists */
 
+#define PCI_CAP_ID_MASK                0x00ff  /* Capability ID mask */
+#define PCI_CAP_LIST_NEXT_MASK 0xff00  /* Next Capability Pointer mask */
+
 #define PCI_CAP_LIST_ID                0       /* Capability ID */
 #define  PCI_CAP_ID_PM         0x01    /* Power Management */
 #define  PCI_CAP_ID_AGP                0x02    /* Accelerated Graphics Port */